= Instantaneous forward voltage (pw = 300µs, D = 2%).
I
R
= Instantaneous reverse current.
t
RR
= Reverse recovery time (See Figure 2), summation of t
A
+ t
B
.
t
A
= Time to reach peak reverse current (See Figure 2).
t
B
= Time from peak I
RM
to projected zero crossing of I
RM
based on a straight line from peak I
RM
through 25% of I
RM
(See Figure 2).
Q
RR
= Reverse recovery charge.
C
J
= Junction Capacitance.
R
θJC
= Thermal resistance junction to case.
E
AVL
= Controlled Avalanche Energy (See Figures 10 and 11).
pw = pulse width.
D = duty cycle.
I
F
= 6A, dI
F
/dt = 200A/µs
I
F
= 6A, dI
F
/dt = 200A/µs
I
F
= 6A, dI
F
/dt = 200A/µs
V
R
= 10V, I
F
= 0A
MIN
-
-
-
-
-
-
-
-
-
-
-
TYP
-
-
-
-
-
-
45
30
400
22
-
MAX
2.1
1.9
100
500
70
90
-
-
-
-
3
UNITS
V
V
µA
µA
ns
ns
ns
ns
nC
pF
o
C/W
V
1
AMPLITUDE CONTROLS I
F
V
2
AMPLITUDE CONTROLS dI
F
/dt
L
1
= SELF INDUCTANCE OF
R
4
+ L
LOOP
R
1
Q
1
+V
1
0
t
2
t
1
R
2
+V
3
Q
2
t
1
≥
5t
A(MAX)
t
2
> t
RR
t
3
> 0
L
1
t
A(MIN)
≤
R
4
10
L
LOOP
DUT
Q
4
0
0.25 I
RM
I
RM
C1
R
4
-V
4
V
RM
V
R
I
F
dI
F
dt
t
A
t
RR
t
B
t
3
0
-V
2
R
3
Q
3
FIGURE 1. t
RR
TEST CIRCUIT
FIGURE 2. t
RR
WAVEFORMS AND DEFINITIONS
2
RURP6120CC
Typical Performance Curves
30
I
R
, REVERSE CURRENT (µA)
500
100
10
+100
o
C
1
0.1
+25
o
C
0.01
+175
o
C
I
F
, FORWARD CURRENT (A)
10
+100
o
C
+175
o
C
1
+25
o
C
0.5
0
0.5
1
1.5
2
2.5
3
0.001
0
200
400
600
800
1000
1200
V
F
, FORWARD VOLTAGE (V)
V
R
, REVERSE VOLTAGE (V)
FIGURE 3. TYPICAL FORWARD CURRENT vs FORWARD
VOLTAGE DROP
FIGURE 4. TYPICAL REVERSE CURRENT vs REVERSE VOLT-
AGE
90
75
t, RECOVERY TIMES (ns)
60
45
30
15
0
0.5
t
RR
T
C
= +25
o
C, dI
F
/dt = 200A/µs
125
T
C
= +100
o
C, dI
F
/dt = 200A/µs
t, RECOVERY TIMES (ns)
100
75
t
RR
50
t
A
25
t
B
t
A
t
B
0
0.5
1
I
F
, FORWARD CURRENT (A)
6
1
I
F
, FORWARD CURRENT (A)
6
FIGURE 5. TYPICAL t
RR
, t
A
AND t
B
CURVES vs FORWARD
CURRENT AT +25
o
C
FIGURE 6. TYPICAL t
RR
, t
A
AND t
B
CURVES vs FORWARD
CURRENT AT +100
o
C
I
F(AV)
, AVERAGE FORWARD CURRENT (A)
150
125
t, RECOVERY TIMES (ns)
100
t
RR
75
50
t
A
t
B
T
C
= +175
o
C, dI
F
/dt = 200A/µs
6
DC
5
SQ. WAVE
4
3
2
1
0
100
25
0
0.5
1
I
F
, FORWARD CURRENT (A)
6
115
130
145
(
o
C)
160
175
T
C
, CASE TEMPERATURE
FIGURE 7. TYPICAL t
RR
, t
A
AND t
B
CURVES vs FORWARD
CURRENT AT +175
o
C
FIGURE 8. CURRENT DERATING CURVE
3
RURP6120CC
Typical Performance Curves
100
C
J
, JUNCTION CAPACITANCE (pF)
(Continued)
80
60
40
20
0
0
50
100
150
200
V
R
, REVERSE VOLTAGE (V)
FIGURE 9. TYPICAL JUNCTION CAPACITANCE vs REVERSE VOLTAGE
L = 40mH
R < 0.1Ω
E
AVL
= 1/2LI
2
[V
AVL
/(V
AVL
- V
DD
)]
Q
1
AND Q
2
ARE 1000V MOSFETs
Q
1
L
R
+
V
DD
130Ω
1MΩ
DUT
VAVL
12V
Q
2
130Ω
CURRENT
SENSE
V
DD
I
L
I V
I
L
-
12V
t
0
t
1
t
2
t
FIGURE 10. AVALANCHE ENERGY TEST CIRCUIT
FIGURE 11. AVALANCHE CURRENT AND VOLTAGE WAVE-
FORMS
4
RURP6120CC
Plastic Packages
A
ØP
Q
H
1
D
E
1
45
o
D
1
TERM. 4
E
A
1
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
INCHES
SYMBOL
A
A
1
b
b
1
c
D
D
1
MIN
0.170
0.048
0.030
0.045
0.014
0.590
-
0.395
-
MAX
0.180
0.052
0.034
0.055
0.019
0.610
0.160
0.410
0.030
0.100 TYP
0.200 BSC
0.235
0.100
0.530
0.130
0.149
0.102
0.255
0.110
0.550
0.150
0.153
0.112
MILLIMETERS
MIN
4.32
1.22
0.77
1.15
0.36
14.99
-
10.04
-
MAX
4.57
1.32
0.86
1.39
0.48
15.49
4.06
10.41
0.76
2.54 TYP
5.08 BSC
5.97
2.54
13.47
3.31
3.79
2.60
6.47
2.79
13.97
3.81
3.88
2.84
NOTES
-
-
3, 4
2, 3
2, 3, 4
-
-
-
-
5
5
-
6
-
2
-
-
L
1
b
1
b
c
L
60
o
1
2
3
E
E
1
e
e
1
J
1
e
e
1
H
1
J
1
L
L
1
ØP
Q
NOTES:
LEAD 1. ANODE 1
LEAD 2. CATHODE
LEAD 3. ANODE 2
TERM. 4. CATHODE
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L
1
.
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bot-
tom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from bot-
tom of dimension D.
7. Controlling dimension: Inch.
8. Revision 1 dated 1-93.
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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