PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors;
R1 = 10 kΩ, R2 = 10 kΩ
Rev. 10 — 15 November 2009
Product data sheet
1. Product profile
1.1 General description
NPN/PNP Resistor-Equipped Transistors (RET).
Table 1.
Product overview
Package
NXP
PEMD3
PIMD3
PUMD3
SOT666
SOT457
SOT363
JEITA
-
SC-74
SC-88
PNP/PNP
complement
PEMB11
-
PUMB11
NPN/NPN
complement
PEMH11
-
PUMH11
Type number
1.2 Features
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
1.3 Applications
Low current peripheral driver
Control of IC inputs
Replaces general-purpose transistors in digital applications
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
R1
R2/R1
Quick reference data
Parameter
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
Min
-
-
7
0.8
Typ
-
-
10
1
Max
50
100
13
1.2
Unit
V
mA
kΩ
NXP Semiconductors
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
2. Pinning information
Table 3.
Pin
1
2
3
4
5
6
Pinning
Description
GND (emitter) TR1
input (base) TR1
output (collector) TR2
GND (emitter) TR2
input (base) TR2
output (collector) TR1
1
2
3
001aab555
TR1
R2
R1
R1
R2
TR2
Simplified outline
6
5
4
Symbol
6
5
4
1
2
3
006aaa143
3. Ordering information
Table 4.
Ordering information
Package
Name
PEMD3
PIMD3
PUMD3
-
SC-74
SC-88
Description
plastic surface mounted package; 6 leads
plastic surface mounted package; 6 leads
plastic surface mounted package; 6 leads
Version
SOT666
SOT457
SOT363
Type number
4. Marking
Table 5.
PEMD3
PIMD3
PUMD3
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Marking codes
Marking code
[1]
D3
M7
D*3
Type number
PEMD3_PIMD3_PUMD3_10
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 10 — 15 November 2009
2 of 11
NXP Semiconductors
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
V
I
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage TR1
positive
negative
input voltage TR2
positive
negative
I
O
I
CM
P
tot
output current (DC)
peak collector current
total power dissipation
SOT363
SOT457
SOT666
T
stg
T
j
T
amb
Per device
P
tot
total power dissipation
SOT363
SOT457
SOT666
[1]
[2]
[3]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
-
-
-
Max
50
50
10
+40
−10
+10
−40
100
100
200
300
200
+150
150
+150
Unit
V
V
V
V
V
V
V
mA
mA
mW
mW
mW
°C
°C
°C
Per transistor; for the PNP transistor with negative polarity
T
amb
≤
25
°C
[1]
[2]
[1][3]
-
-
-
−65
-
−65
storage temperature
junction temperature
ambient temperature
T
amb
≤
25
°C
[1]
[2]
[1][3]
-
-
-
300
600
300
mW
mW
mW
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Device mounted on an FR4 PCB with 65
μm
copper strip line, standard footprint.
Reflow soldering is the only recommended soldering method.
PEMD3_PIMD3_PUMD3_10
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 10 — 15 November 2009
3 of 11
NXP Semiconductors
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
SOT363
SOT457
SOT666
Per device
R
th(j-a)
thermal resistance from
junction to ambient
SOT363
SOT457
SOT666
[1]
[2]
[3]
Conditions
in free air
[1]
[2]
[1][3]
Min
Typ
Max
Unit
Per transistor
-
-
-
-
-
-
625
417
625
K/W
K/W
K/W
in free air
[1]
[2]
[1][3]
-
-
-
-
-
-
416
208
416
K/W
K/W
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB with 65
μm
copper strip line, standard footprint.
Reflow soldering is the only recommended soldering method.
7. Characteristics
Table 8.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
I
CBO
I
CEO
collector-base cut-off
current
collector-emitter
cut-off current
emitter-base cut-off
current
DC current gain
collector-emitter
saturation voltage
Conditions
V
CB
= 50 V; I
E
= 0 A
V
CE
= 30 V; I
B
= 0 A
V
CE
= 30 V; I
B
= 0 A;
T
j
= 150
°C
V
EB
= 5 V; I
C
= 0 A
V
CE
= 5 V; I
C
= 5 mA
I
C
= 10 mA; I
B
= 0.5 mA
Min
-
-
-
-
30
-
-
2.5
7
0.8
V
CB
= 10 V; I
E
= i
e
= 0 A;
f = 1 MHz
-
-
-
Typ
-
-
-
-
-
-
1.1
1.8
10
1
-
-
-
Max
100
1
50
400
-
150
0.8
-
13
1.2
-
2.5
3
pF
pF
mV
V
V
kΩ
Unit
nA
μA
μA
μA
Per transistor; for the PNP transistor with negative polarity
I
EBO
h
FE
V
CEsat
V
I(off)
V
I(on)
R1
R2/R1
C
c
off-state input voltage V
CE
= 5 V; I
C
= 100
μA
on-state input voltage V
CE
= 0.3 V; I
C
= 10 mA
bias resistor 1 (input)
bias resistor ratio
collector capacitance
TR1 (NPN)
TR2 (PNP)
PEMD3_PIMD3_PUMD3_10
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 10 — 15 November 2009
4 of 11
NXP Semiconductors
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
10
3
h
FE
(1)
(2)
(3)
006aaa034
1
006aaa035
V
CEsat
(V)
10
2
10
−1
(1)
(2)
(3)
10
1
10
−1
1
10
I
C
(mA)
10
2
10
−2
1
10
I
C
(mA)
10
2
V
CE
= 5 V
(1) T
amb
= 150
°C
(2) T
amb
= 25
°C
(3) T
amb
=
−40 °C
I
C
/I
B
= 20
(1) T
amb
= 100
°C
(2) T
amb
= 25
°C
(3) T
amb
=
−40 °C
Fig 1.
TR1 (NPN): DC current gain as a function of
collector current; typical values
10
006aaa036
Fig 2.
TR1 (NPN): Collector-emitter voltage as a
function of collector current; typical values
10
006aaa037
V
I(on)
(V)
(1)
(2)
V
I(off)
(V)
(1)
1
(3)
1
(2)
(3)
10
−1
10
−1
1
10
I
C
(mA)
10
2
10
−1
10
−2
10
−1
1
I
C
(mA)
10
V
CE
= 0.3 V
(1) T
amb
=
−40 °C
(2) T
amb
= 25
°C
(3) T
amb
= 100
°C
V
CE
= 5 V
(1) T
amb
=
−40 °C
(2) T
amb
= 25
°C
(3) T
amb
= 100
°C
Fig 3.
TR1 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 4.
TR1 (NPN): Off-state input voltage as a
function of collector current; typical values
PEMD3_PIMD3_PUMD3_10
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 10 — 15 November 2009
5 of 11
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