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AR8033 Integrated 10/100/1000 Mbps
Ethernet Transceiver
Data Sheet
80-Y0618-2 Rev A
October 25, 2012
Confidential and Proprietary - Qualcomm Atheros, Inc.
Restricted Distribution.
Not to be distributed to anyone who is not an employee of either Qualcomm or a subsidiary
of Qualcomm without the express approval of Qualcomm’s Configuration Management.
Not to be used, copied, reproduced in whole or in part, nor its contents revealed in any manner to others without the
express written permission of Qualcomm Atheros, Inc.
QUALCOMM is a registered trademark of QUALCOMM Incorporated. ATHEROS is a registered trademark of
Qualcomm Atheros, Inc. All other registered and unregistered trademarks are the property of Qualcomm
Incorporated, Qualcomm Atheros, Inc. or their respective owners and used with permission. Registered marks owned
by Qualcomm Incorporated and Qualcomm Atheros, Inc. are registered in the United States of America and may be
registered in other countries.
This technical data may be subject to U.S. and international export, re-export, or transfer (“export”) laws. Diversion
contrary to U.S. and international law is strictly prohibited.
Qualcomm Atheros, Inc.
1700 Technology Drive
San Jose, CA 95110-1383
U.S.A.
Copyright © 2011-2012 Qualcomm Atheros, Inc.
All rights reserved.
Revision history
Revision
1.0
2.0
Date
April 2011
November 2011
Initial release
Description
Electrical Characteristics
3.2 Recommended Operation Conditions: delete DVDDL/AVDDL,
Ψ
JA
; add VDDH_REG,
Ψ
JT
, AVDDL/DVDDL (industrial and
commercial); add thermal conditions
3.6 change title from MDIO DC Characteristics to MDIO/MDC DC...;
change V
IH
min value and V
IL
max value
3.7 table 3-14: change Jitter
pk-pk
max value to 100
3.11 Digital pin design guide (new)
Registers
4.2.3 Status Register – Copper page, change bit[8] reset value to
always 1
4.3.4 Hib control and auto-neg test register: change bit[12], [6:5] to
reserved
4.3.5 External loopback selection, change bit[0] to R/W
4.3.7 Power saving control (new)
4.4.75 SGMII Control register 2 (new)
4.4.76 SGMII Control register 3 (new)
80-Y0618-2 Rev A
2
Confidential and Proprietary - Qualcomm Atheros, Inc.
MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION
AR8033 Integrated 10/100/1000 Mbps Ethernet Transceiver Data Sheet
Revision
A
Date
October 2012
Description
System change from SharePoint to Agile. Based on SharePoint
document system MKG-15552.
Introduction
Update Features
Update figure functional block diagram
Pin Description
Update Table Mode definition
Update Table Signal to pin descriptions
Function Descriptioin
Update Copper
Update Fiber
Update Auto-negotiation
Update Fault propagation
LED interface: add table BaseX LED status after table 3-5 Default
LED status
Synchronous Ethernet: add CLK_25M output content
Update Function Wake on LAN
Electrical Characteristics
Absolute maximum ratings: add symbol Vmin
Update RGMII characteristics:
Table RGMII DC characteristics — 2.5/3/3V I/O supply: add GND -
0.3 to Min of symbol V
IL
Table RGMII DC characteristics — 1.8V I/O supply: add 2.1 to Max
for symbol V
IH
, add GND - 0.3 to Min for symbol V
IL
, and add 1.9
to Max for symbol V
OH
Table RGMII DC characteristics — 1.5V I/O supply: add 1.8 to Max
for symbol V
IH
, add GND - 0.3 to Min for symbol V
IL
, and add 1.57
to Max for symbol V
OH
Update RGMII characteristics and AC timing diagrams
MDIO timing: change Min from 10 to 0, add Typ 4, and remove Max of
symbol tmdelay in Table MDIO AC characteristic
Clock characteristics: remove symbol Fs and Fo in table
Recommended crystal parameters
Power pin current consumption: update the voltage range from “3.3V
±10%” to “3.3V ±5%” for symbol AVDD33 in table Power pin
consumption
80-Y0618-2 Rev A
3
Confidential and Proprietary - Qualcomm Atheros, Inc.
MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION
AR8033 Integrated 10/100/1000 Mbps Ethernet Transceiver Data Sheet
Revision
Date
Description
Update Registers
Add a note to table Register summary
Control register
Status register
Auto-negotiation advertisement register
1000BASE-T status register
Extended status register
Function control register
Smart speed register: add bit[8]: GIGA_DIS_QUAL
Copper/fiber status register
Remove registers Auto-negotiation status, Auto-negotiation XNP
transmit, Auto-negotiation XNP transmit1, Auto-negotiation XNP
transmit2, Auto-negotiation LP XNP ability, Auto-negotiation LP XNP
ability1, Auto-negotiation LP XNP ability2
Add registers PHY control debug register 0, Green feature configure
2, AZ control2, Cld control3, SGMII control register 1
80-Y0618-2 Rev A
4
Confidential and Proprietary - Qualcomm Atheros, Inc.
MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION
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