CD4015BC Dual 4-Bit Static Shift Register
October 1987
Revised January 1999
CD4015BC
Dual 4-Bit Static Shift Register
General Description
The CD4015BC contains two identical, 4-stage, serial-
input/parallel-output registers with independent “Data”,
“Clock,” and “Reset” inputs. The logic level present at the
input of each stage is transferred to the output of that stage
at each positive-going clock transition. A logic high on the
“Reset” input resets all four stages covered by that input.
All inputs are protected from static discharge by a series
resistor and diode clamps to V
DD
and V
SS
.
Features
s
Wide supply voltage range:
s
High noise immunity:
compatibility:
3.0V to 18V
0.45 V
DD
(typ.)
s
Low power TTL: Fan out of 2 driving 74L
or 1 driving 74LS
s
Medium speed operation: 8 MHz (typ.) clock rate
s
Fully static design: @V
DD
−
V
SS
=
10V
Applications
• Serial-input/parallel-output data queueing
• Serial to parallel data conversion
• General purpose register
Ordering Code:
Order Number
CD4015BCM
CD4015BCN
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Truth Table
CL
(Note 1)
D
0
1
X
X
R
0
0
0
1
X
Q
1
0
1
Q
1
0
Q
n
Q
n−1
Q
n−1
Q
n
0
(No change)
X
=
Don't Care Case
Note 1:
Level Change
© 1999 Fairchild Semiconductor Corporation
DS005948.prf
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CD4015BC
Logic Diagrams
Terminal No. 16
=
V
DD
Terminal No. 8
=
GND
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2
CD4015BC
Absolute Maximum Ratings
(Note 2)
(Note 3)
DC Supply Voltage (V
DD
)
Input Voltage (V
IN
)
Storage Temperature Range (T
S
)
Power Dissipation (P
D
)
Dual-In-Line
Small Outline
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260°C
700 mW
500 mW
−0.5
to
+18
V
DC
−0.5
to V
DD
+0.5
V
DC
−65°C
to
+150°C
Recommended Operating
Conditions
DC Supply Voltage (V
DD
)
Input Voltage (V
IN
)
Operating Temperature Range (T
A
)
+3
to
+15
V
DC
0 to V
DD
V
DC
−40°C
to
+85°C
Note 2:
“Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed; they are not meant to imply that
the devices should be operated at these limits. The tables of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provide con-
ditions for actual device operation.
Note 3:
V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 3)
Symbol
I
DD
Parameter
Quiescent Device
Current
V
OL
LOW Level
Output Voltage
V
OH
HIGH Level
Output Voltage
V
IL
LOW Level
Input Voltage
V
IH
HIGH Level
Input Voltage
I
OL
LOW Level Output
Current (Note 4)
I
OH
HIGH Level Output
Current (Note 4)
I
IN
Input Current
Conditions
V
DD
=
5V, V
IN
=
V
DD
or V
SS
V
DD
=
10V, V
IN
=
V
DD
or V
SS
V
DD
=
15V, V
IN
=
V
DD
or V
SS
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V, V
O
=
0.5V or 4.5V
V
DD
=
10V, V
O
=
1.0V or 9.0V
V
DD
=
15V, V
O
=
1.5V or 13.5V
V
DD
=
5V, V
O
=
0.5V or 4.5V
V
DD
=
10V, V
O
=
1.0V or 9.0V
V
DD
=
15V, V
O
=
1.5V or 13.5V
V
DD
=
5V, V
O
=
0.4V
V
DD
=
10V, V
O
=
0.5V
V
DD
=
15V, V
O
=
1.5V
V
DD
=
5V, V
O
=
4.6V
V
DD
=
10V, V
O
=
9.5V
V
DD
=
15V, V
O
=
13.5V
V
DD
=
15V, V
IN
=
0V
V
DD
=
15V, V
IN
=
15V
Note 4:
I
OH
and I
OL
are tested one output at a time.
−40°C
Min
Max
20
40
80
0.05
0.05
0.05
4.95
9.95
14.95
1.5
3.0
4.0
3.5
7.0
11.0
0.52
1.3
3.6
−0.52
−1.3
−3.6
−0.3
0.3
3.5
7.0
11.0
0.44
1.1
3.0
−0.44
−1.1
−3.0
4.95
9.95
14.95
Min
+25°C
Typ
0.005
0.010
0.015
0
0
0
5
10
15
2.25
4.50
6.75
2.75
5.50
8.25
0.88
2.25
8.8
−0.88
−2.25
−8.8
−10
−5
+85°C
Max
20
40
80
0.05
0.05
0.05
4.95
9.95
14.95
1.5
3.0
4.0
3.5
7.0
11.0
0.36
0.9
2.4
−0.36
−0.9
−2.4
−0.3
0.3
−1.0
1.0
1.5
3.0
4.0
Min
Max
150
300
600
0.05
0.05
0.05
Units
µA
µA
µA
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
µA
µA
10
−5
3
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CD4015BC
AC Electrical Characteristics
Symbol
CLOCK OPERATION
t
PHL
, t
PLH
Propagation Delay Time
Parameter
(Note 5)
Conditions
Min
Typ
Max
Units
T
A
=
25
°
C, C
L
=
50 pF, R
L
=
200k, t
r
=
t
f
=
20 ns, unless otherwise specified
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
230
80
60
100
50
40
160
60
50
350
160
120
200
100
80
250
110
85
15
15
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
MHz
MHz
MHz
t
THL
, t
TLH
Transition Time
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
WL
, t
WM
Minimum Clock
Pulse-Width
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
Clock Input
Other Inputs
2
4.5
6
t
rCL
, t
fCL
Clock Rise and
Fall Time
t
SU
Minimum Data
Set-Up Time
50
20
15
3.5
8
11
7.5
5
200
100
80
135
40
30
100
40
30
f
CL
Maximum Clock
Frequency
C
IN
RESET OPERATION
t
PHL(R)
Input Capacitance
10
7.5
400
200
160
250
80
60
pF
pF
ns
ns
ns
ns
ns
ns
Propagation Delay Time
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
WH(R)
Minimum Reset
Pulse Width
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
Note 5:
AC Parameters are guaranteed by DC correlated testing.
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4
CD4015BC
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
Package Number M16A
5
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