Hitachi 16-Bit Single-Chip Microcomputer
H8S/2639 Series,
H8S/2638 Series,
H8S/2636 Series
Hardware Manual
ADE-602-189C
Rev. 4.0
01/24/03
Hitachi, Ltd.
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Preface
This LSI has the internal 32-bit H8S/2600 CPU and includes a variety of peripheral functions
necessary for a system configuration. It serves as a high-performance microcomputer.
The built-in peripheral devices include a 16-bit timer pulse unit (TPU), a programmable pulse
generator (PPG), a watchdog timer unit (WDT), a serial communication interface (SCI), an A/D
converter, a motor control PWM timer (PWM), a PC brake controller and I/O ports. It also has an
internal data transfer controller (DTC), which performs high-speed data transfer without using the
CPU, thus enabling the use of the LSI as an embedded microcomputer in various advanced control
systems. Two types of internal ROM are available: flash memory (F-ZTAT™*) and mask ROM.
The LSI can be used flexibly in a wide range of applications from applied equipment with varied
specifications and early production models to full-scale mass-produced products.
Note: * F-ZTAT™ is a trademark of Hitachi, Ltd.
Target Users: This manual was written for users who will be using the H8S/2636, H8S/2638 and
H8S/2639 in the design of application systems. Members of this audience are
expected to understand the fundamentals of electrical circuits, logical circuits, and
microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the H8S/2636, H8S/2638, and H8S/2639 to the above audience.
Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual for a detailed
description of the instruction set.
Notes on reading this manual:
•
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
•
In order to understand the details of the CPU's functions
Read the H8S/2600 Series, H8S/2000 Series Programming Manual.
•
In order to understand the details of a register when its name is known
The addresses, bits, and initial values of the registers are summarized in Appendix B, Internal
I/O Registers.
Example: Bit order: The MSB is on the left and the LSB is on the right.
Related Manuals:
The latest versions of all related manuals are available from our web site.
Please ensure you have the latest versions of all documents you require.
http://www.hitachisemiconductor.com/
H8S/2636, H8S/2638, H8S/2639 manuals:
Manual Title
H8S/2636, H8S/2638, H8S/2639 Hardware Manual
H8S/2600 Series, H8S/2000 Series Programming Manual
ADE No.
This manual
ADE-602-083
Users manuals for development tools:
Manual Title
C/C++ Compiler, Assembler, Optimized Linkage Editor User's Manual
Simulator Debugger (for Windows) User's Manual
Hitachi Embedded Workshop User's Manual
ADE No.
ADE-702-247
ADE-702-037
ADE-702-201
Application Notes:
Manual Title
H8S Series Technical Q & A
ADE No.
ADE-502-059
List of Items Revised or Added for This Version
Section
1.1 Overview
Table 1-1 Overview
Page
5
Description
”Product lineup” specifications
Note
*
deleted
Note amended
Note:
*
Subclock functions (subactive mode, subsleep mode, and
watch mode) are available only in the U-mask and W-mask
versions, but are not available in the other versions.
1.2 Internal Block
Diagram
Figure 1-1(a) Internal
Block Diagram of
H8S/2636
6
Added to Note
Note:
*2
The FWE pin only applies to the flash memory versions. The
FWE pin is a NC pin in the mask ROM versions. In the mask
ROM version, the FWE pin must be left open or be connected
to Vss.
Note amended and added
Notes:
*1
Subclock functions (subactive mode, subsleep mode, and
watch mode) are available only in the U-mask and W-mask
versions. These functions cannot be used with the other
versions. See section 22A.7, Subclock Oscillator, for the
method of fixing pins OSC1 and OSC2.
*2
These pins are used for the I
2
C bus interface. The I
2
C bus
interface is available as an option. The product equipped
with the I
2
C bus interface is the W-mask version.
*3
The FWE pin is for compatibility with the flash memory
version. The FWE pin is a NC pin in the mask ROM
versions. In the mask ROM version, the FWE pin must be
left open or be connected to Vss.
Figure 1-1 (b)
7
Internal Block
Diagram of H8S/2638
and H8S/2639
1.3.1 Pin
Arrangement
Figure 1-2 Pin
Arrangement of
HD64F2636F (FP-
128B:Top View)
8
Added to Note
Note:
*3
The FWE pin is for compatibility with the flash memory
version. The FWE pin is a NC pin in the mask ROM versions.
In the mask ROM version, the FWE pin must be left open or
be connected to Vss.
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