Low Skew, 1-to-8, Crystal
Oscillator/LVCMOS-TO-3.3V LVPECL Fanout Buffer
8538-31
DATA SHEET
General Description
The 8538-31 is a low skew, high performance 1-to-8 Crystal
Oscillator/LVCMOS-to-3.3V LVPECL Fanout Buffer. The 8538-31
has selectable single ended clock or crystal inputs. The single ended
clock input accepts LVCMOS or LVTTL input levels and translate
them to 3.3V LVPECL levels. The output enable is internally
synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the
8538-31 ideal for those applications demanding well defined
performance and repeatability.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Eight differential 3.3V LVPECL outputs
Selectable LVCMOS/LVTTL clock or crystal inputs
CLK can accept the following input levels: LVCMOS, LVTTL
Maximum output frequency: 266MHz
Crystal frequency range: 14MHz - 40MHz
Output skew: 50ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 2.2ns (maximum)
3.3V operating supply mode
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Available in lead-free (RoHS 6) package
Block Diagram
CLK_EN
Pullup
D
Q
LE
CLK
Pulldown
XTAL_IN
0
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Pin Assignment
CLK
CLK_SEL
CLK_EN
V
EE
nQ7
Q7
V
CCO
nQ6
Q6
nQ5
Q5
V
EE
nQ4
Q4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
XTAL_IN
XTAL_OUT
V
EE
Q0
nQ0
V
CCO
Q1
nQ1
Q2
nQ2
V
CCO
Q3
nQ3
OSC
XTAL_OUT
CLK_SEL
Pulldown
1
28-Lead TSSOP, 173MIL
4.4mm x 9.7mm x 0.925
mm package body
G Package
Top View
8538-31 Rev B 7/10/15
1
©2015 Integrated Device Technology, Inc.
8538-31 DATA SHEET
Table 1. Pin Descriptions
Number
1
2
3
4, 12, 25
5, 6
7, 17, 22
8, 9
10, 11
13, 14
15, 16
18, 19
20, 21
23, 24
26,
27
28
Name
CLK
CLK_SEL
CLK_EN
V
EE
nQ7, Q7
V
CCO
nQ6, Q6
nQ5, Q5
nQ4, Q4
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
XTAL_OUT
XTAL_IN
V
CC
Input
Input
Input
Power
Output
Power
Output
Output
Output
Output
Output
Output
Output
Input
Power
Type
Pulldown
Pullup
Negative supply pins.
Differential output pair. LVPECL interface levels.
Output supply pins.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Positive supply pin.
Description
Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
Rev B 7/10/15
2
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V
LVPECL FANOUT BUFFER
8538-31 DATA SHEET
Function Tables
Table 3A. Control Input Function Table
Inputs
CLK_EN
0
0
1
1
CLK_SEL
0
1
0
1
Selected Source
CLK
XTAL_IN, XTAL_OUT
CLK
XTAL_IN, XTAL_OUT
Q0:Q7
Disabled; Low
Disabled; Low
Enabled
Enabled
Outputs
nQ0:nQ7
Disabled; High
Disabled; High
Enabled
Enabled
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or crystal oscillator edge as shown
in Figure 1. In the active mode, the state of the outputs are a function of the CLK input as described in Table 3B.
Disabled
Enabled
CLK
CLK_EN
nQ0:nQ7
Q0:Q7
Figure 1. CLK_EN Timing Diagram
Table 3B. Clock Input Function Table
Inputs
CLK
0
1
Q0:Q7
LOW
HIGH
Outputs
nQ0:nQ7
HIGH
LOW
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V
LVPECL FANOUT BUFFER
3
Rev B 7/10/15
8538-31 DATA SHEET
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
49.8C/W (0 lfpm)
-65C to 150C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
CC
= V
CCO
= 3.3V±5%, V
EE
= 0V, T
A
= 0°C to 70°C
Symbol
V
CC
V
CCO
I
EE
I
CCO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
110
50
Units
V
V
mA
mA
Table 4B. LVCMOS/LVTTL DC Characteristics,
V
CC
= V
CCO
= 3.3V±5%, V
EE
= 0V, T
A
= 0°C to 70°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
Input
High Current
Input
Low Current
CLK, CLK_SEL
CLK_EN
CLK, CLK_SEL
CLK_EN
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-5
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
I
IL
Table 4C. LVPECL DC Characteristics,
V
CC
= V
CCO
= 3.3V±5%, V
EE
= 0V, T
A
= 0°C to 70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO
– 1.4
V
CCO
– 2.0
0.6
Typical
Maximum
V
CCO
– 0.9
V
CCO
– 1.7
1.0
Units
µA
µA
V
NOTE 1: Outputs terminated with 50 to V
CCO
– 2V.
Rev B 7/10/15
4
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V
LVPECL FANOUT BUFFER
8538-31 DATA SHEET
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
14
Test Conditions
Minimum
Typical
Fundamental
40
50
7
1
MHz
Maximum
Units
pF
mW
AC Electrical Characteristics
Table 6. AC Characteristics,
V
CC
= V
CCO
= 3.3V±5%, V
EE
= 0V, T
A
= 0°C to 70°C
Parameter Symbol
f
MAX
t
PD
tsk(o)
tsk(pp)
t
R
/ t
F
odc
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
45
Test Conditions
Minimum
Typical
Maximum
266
2.2
50
250
700
55
Units
MHz
ns
ps
ps
ps
%
All parameters measured at f
MAX
unless noted otherwise.
NOTE 1: Measured from V
CC
/2 input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V
LVPECL FANOUT BUFFER
5
Rev B 7/10/15
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