HIGH-SPEED CMOS BUS EXCHANGE SWITCH WITH ACTIVE TERMINATION
INDUSTRIAL TEMPERATURE RANGE
QUICKSWITCH
®
PRODUCTS
HIGH-SPEED CMOS BUS EXCHANGE
SWITCH WITH ACTIVE TERMINATION
(BUS HOLD)
FEATURES:
• Enhanced N channel FET with no inherent diode to Vcc
• 5Ω bidirectional switches connect inputs to outputs
Ω
• Active termination drives bus pins to rails when switches are
off
• Zero propagation delay, zero added ground bounce
• Undershoot clamp diodes on all switch and control inputs
• Bus exchange allows nibble swap
• TTL-compatible input and output levels
• Bus-hold eliminates floating bus lines and reduces static
power consumption
• Available in QSOP package
IDTQS3388
DESCRIPTION:
The QS3388 provides ten high-speed CMOS TTL-compatible bus
switches with active terminators on the bus switch I/O pins. The low ON
resistance (5Ω) of the 3388 allows inputs to be connected to outputs without
adding propagation delay and without generating additional ground bounce
noise. When the switches are turned off, a low drive active terminator circuit
drives the disconnected pins to V
CC
or ground, away from the TTL threshold.
This prevents undriven buses from floating. The Bus Enable (BE) signal
turns the switches on. The Bus Exchange (BX) signal provides nibble swap
of the AB and CD pairs of signals. This exchange configuration allows byte
swapping of buses in systems. It can also be used as a five-wide 2-to-1
multiplexer and to create low delay barrel shifters, etc.
The QS3388 is characterized for operation at -40°C to +85°C.
APPLICATIONS:
• Resource sharing
• Crossbar switching
• Last value latch (graphics and DSP)
FUNCTIONAL BLOCK DIAGRAM
A
0
T
T
C
0
R
B
0
T
T
D
0
T
=
A
4
T
T
C
4
B
4
T
T
D
4
BX
BE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2000 Integrated Device Technology, Inc.
APRIL 2000
DSC-5765/1
IDTQS3388
HIGH-SPEED CMOS BUS EXCHANGE SWITCH WITH ACTIVE TERMINATION
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
Description
Supply Voltage to Ground
DC Switch Voltage V
S
DC Input Voltage V
IN
AC Input Voltage (pulse width
≤20ns)
DC Output Current
Maximum Power Dissipation (T
A
= 85°C)
Storage Temperature
Max
–0.5 to +7
–0.5 to +7
–0.5 to +7
–3
120
0.5
–65 to +150
Unit
V
V
V
V
mA
W
°C
V
TERM
(3)
V
TERM
(3)
V
AC
I
OUT
P
MAX
T
STG
BE
C
0
A
0
B
0
D
0
C
1
A
1
B
1
D
1
C
2
A
2
GND
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
QSOP
TOP VIEW
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
V
CC
D
4
B
4
A
4
C
4
D
3
B
3
A
3
C
3
D
2
B
2
BX
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
CAPACITANCE
(T
A
= +25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V)
Pins
Control Inputs
Quickswitch Channels (Switch OFF)
Typ.
3
5
Max.
(1)
5
7
Unit
pF
pF
NOTE:
1. This parameter is guaranteed but not production tested.
PIN DESCRIPTION
Pin Names
A
0
- A
4
, B
0
- B
4
C
0
- C
4
, D
0
- D
4
BE
BX
I/O
I/O
I/O
I
I
Description
A and B Buses
C and D Buses
Bus Switch Enable
Bus Exchange
FUNCTION TABLE
(1)
BE
H
L
L
BX
X
L
H
A
0
- A
4
Hi-Z
C
0
- C
4
D
0
- D
4
B
0
- B
4
Hi-Z
D
0
- D
4
C
0
- C
4
Function
Disconnect
Connect
Exchange
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-Impedance
2
IDTQS3388
HIGH-SPEED CMOS BUS EXCHANGE SWITCH WITH ACTIVE TERMINATION
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5V ± 5%
Symbol
V
IH
V
IL
I
IN
R
ON
I
BH
I
BHH
I
BHL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current (Control Inputs)
Switch ON Resistance
Input Current
(2)
Switch Pins
Bus Hold Sustaining Sink Current - LOW
(4)
Test Conditions
Guaranteed Logic HIGH for Control Pins
Guaranteed Logic LOW for Control Pins
0V
≤
V
IN
≤
Vcc
Vcc = Min., V
IN
= 0V, I
ON
= 30mA
Vcc = Min., V
IN
= 2.4V, I
ON
= 15mA
Vcc = Max., V
IN
= 0V or Vcc
Vcc = Max., 0.8V < V
IN
< 2V
Vcc = Min., V
IN
= 0.8V
Min.
2
—
—
—
—
—
—
Typ.
(1)
Max.
—
—
.01
6
12
—
—
—
—
—
0.8
±1
8
17
±20
±500
—
—
µA
µA
Unit
V
V
µA
Ω
Bus Hold Sustaining Source Current - HIGH
(3)
Vcc = Min., V
IN
= 2V
–
60
+ 60
NOTES:
1. Typical values are at V
CC
= 5.0V, T
A
= 25°C.
2. Input current specified under two conditions:
a) Input voltage at GND or Vcc. This indicates the input current under steady-state condition.
b) Input voltage between 0.8V and 2V (TTL input threshold range). This indicates the maximum input current during transient condition. The driver connected to the input
must overcome this current requirement in order to switch the logic state of the bus-hold circuit.
3. I
BHH
represents the latching capability of the bus-hold circuit in logic HIGH state.
4. I
BHL
represents the latching capability of the bus-hold circuit in logic LOW state.
TYPICAL ON RESISTANCE vs V
IN
AT V
CC
= 5V
16
R
ON
(ohms)
14
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
IN
(Volts)
3
IDTQS3388
HIGH-SPEED CMOS BUS EXCHANGE SWITCH WITH ACTIVE TERMINATION
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
I
CCQ
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Power Supply Current per Input HIGH
(2)
Dynamic Power Supply Current per MHz
(3)
Test Conditions
(1)
V
CC
= Max., V
IN
= GND or V
CC
, f = 0
V
CC
= Max., V
IN
= 3.4V, f = 0
V
CC
= Max., A - D Pins Open, Control Inputs Toggling @ 50% Duty Cycle
Max.
1.5
2.5
0.25
Unit
mA
mA
mA/MHz
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TTL-driven input (V
IN
= 3.4V, control inputs only). A - D pins do not contribute to
∆Icc.
3. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The A-D inputs generate no significant
AC or DC currents as they transition. This parameter is guaranteed but not production tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
T
A
= -40°C to +85°C, V
CC
= 5V ± 5%
C
LOAD
= 50pF, R
LOAD
= 500Ω unless otherwise noted.
Symbol
t
PLH
t
PHL
t
PZL
t
PZH
t
PLZ
t
PHZ
t
BX
Parameter
Data Propagation Delay
(2)
AxBx to CxDx, CxDx to AxBx
Switch Turn-On Delay
BE
to Ax, Bx, Cx, Dx
Switch Turn-Off Delay
(2)
BE
to Ax, Bx, Cx, Dx
Switch Multiplex Delay
BX to Ax, Bx, Cx, Dx
1.5
6.5
ns
Min
.
(1)
1.5
1.5
Typ.
Max.
0.25
(3)
6.5
5.5
Unit
ns
ns
ns
NOTES:
1. Minimums are guaranteed but not production tested.
2. This parameter is guaranteed but not production tested.
3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone
is of the order of 0.25ns at C
L
= 50pF. Since this time constant is much smaller than the rise and fall times of typical driving signals, it adds very little propagation delay to the
system. Propagation delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load on
the driven side.
4
IDTQS3388
HIGH-SPEED CMOS BUS EXCHANGE SWITCH WITH ACTIVE TERMINATION
INDUSTRIAL TEMPERATURE RANGE
ACTIVE TERMINATOR OR ‘BUS-HOLD’ CIRCUIT
The Active Terminator circuit, also known as the Bus-hold circuit, is configured as a “weak latch” with positive feedback. When connected to a TTL
or CMOS input port, the Bus-hold circuit holds the last logic state at the input when the input is “disconnected” from the driver. When the output of a device
connected to such an input attempts a logic level transition, it will over-drive the Bus-hold circuit. The primary benefit of this circuit is that it prevents CMOS
inputs from floating, a situation which should be avoided to prevent spurious switching of inputs and unnecessary power dissipation. Bus-hold is a better
solution than the traditional approach of using resistive termination to V
CC
or GND to prevent bus floating, because the Bus-hold circuit does not consume
any static power.
V-I CHARACTERISTICS OF BUS-HOLD CIRCUIT
I
B H
+ 500
Sinking
Current
(+)
I
BHL
I
B H
I
BH H
Sourcing
Current
(–)
+60
+20
– 20
– 60
+60 I
B HL
V
T
Voltage
+ 20 I
BH
– 20 I
BH
– 60 I
BHH
Vcc
V
IL
V
IH
I
B H
– 500
0.8V
2V
V
T
≡
Threshold Voltage
≈
1.5V
V
IL
≈
.8
V
IH
≈
2V
The figure above shows the input V-I characteristics of a Bus-hold implementation. The input characteristics resemble a resistor. As the input voltage
is increased from 0 volts, the ‘sink’ current increases linearly. When the TTL threshold of the circuit is reached (typically 1.5 volts), the latch changes the
logic state due to positive feedback and the direction of current is reversed. As the voltage is further increased towards V
CC
, the input ‘source’ current
begins to decrease, reaching the lowest level at V
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