Multilayer Ceramic Chip Capacitors
MA
Series
MERITEK
F
EATURES AND
A
PPLICATIONS
Dielectric
COG
(NPO)
Features
Ultra-stable
Low dissipation factor
Tight tolerance available
Good frequency performance
No aging of capacitance
Semi-stable high K
High volumetric efficiency
Highly reliable in high
temperature applications
High insulation resistance
Highest volumetric efficiency
Non-polar construction
General purpose, high K
Applications
LC and RC tuned circuit
Filtering
Timing
X7R/X5R
Y5V
Blocking
Coupling
Timing
Bypassing
Frequency discriminating
Filtering
Bypassing
Decoupling
Filtering
P
ART
N
UMBERING
S
YSTEM
MA
Meritek Series
Size
Dielectric
CODE
CG
COG (NPO)
8R2
8.2
--
--
XR
X7R
101
100
0.1
--
XF
X5R
223
22000
22
0.022
YV
Y5V
104
100000
100
0.1
CODE
D
J
Z
Tolerance
±.5pF
±5%
+80/-20%
1206
XR
103
K
500
Capacitance
CODE
pF
nF
μF
Tolerance
CODE
Tolerance
CODE
Tolerance
B
±.1pF
C
±.25pF
F
±1%
G
±2%
K
±10%
M
±20%
For values less than 10 pF C or D tolerance preferred
Rated Voltage
2 significant digits + number of zeros.
Code
250
500
101
25V
50V
100V
251
250V
501
500V
102
1000V
202
2000V
302
3000V
EIA CASE SIZE
Length (L)
Width (W)
0201
0.6 ±0.03
0.3 ±0.03
0402
1.0 ±0.05
0.5 ±0.05
0.60
0.2 ±0.1
0603
1.6 ±0.15
1.0
0.4 ±0.2
0805
2.0 ±0.2
1.30
0.5 ±0.2
1206
3.2 ±0.2
1.50
0.6 ±0.2
1210
3.2 ±0.3
2.5 ±0.3
1812
4.5 ±0.3
3.2 ±0.3
2225
5.7 ±0.4
6.35 ±0.25
0.8 ±0.15 1.25 ±0.2 1.6 ±0.12
Max. Thickness (T)
0.30
Termination Width (E) 0.15 ±0.05
1.70
1.70
1.78
0.75 ±0.25 0.75 ±0.25 0.75 ±0.25
rev.6
Specifications are
subject to change without notice.
Mutilayer Ceramic Chip Capacitors
MA
Series
MERITEK
P
ERFORMANCE
S
PECIFICATION
1. E
LECTRICAL
DIELECTRIC CODE
EIA
NPO
0
±30ppm/
o
C , C>20pF
0
Operating Temperature Range
Measuring Conditions for
Capacitance and D.F.
Dissipation Factor (D.F.)
and Tangent of Loss Angle (tan)
+120
X7R
C
±15%
maximum
over -55 C to +125 C
-55
o
C to +125
o
C
1KHz, 1Vrms
o
o
Y5V
C
+22/-82%
maximum
over
-30
o
C to +85
o
C
-30
C to +85
o
C
1KHz, 10Vrms
o
Temperature Characteristics *1
/
-40
ppm/ C, C
<
20pF
o
-55
o
C to +125
o
C
1MHz, 1Vrms, C
<
1000pF
1 KHz, 1 Vrms, C
>
1000pF
<
0.1% for C
>
30pF
<
<
100%
*2
<
2.5% at
>
50V rated
<
3.5% at 16V, 25V rated
<
5.0% at 6.3V, 10V rated
<
<
5% at 50V rated
<
7% at 16V, 25V rated
<
10
% at 6.3V, 10V rated
<
/
(400+20C)
for C<30pF
1000M
Ω
μF
100M
Ω
μF
60 secs. charging at rated
voltage, 25
o
C, 55% RH max.
Voltage Proof, 25
o
C, 1-5 secs.
Capacitance Aging
whichever is less
2.5 x Rated Voltage
0
whichever is less
2.5 x Rated Voltage
~2.5% per decade hour
~ 7% per decade hour
~
~
*1 Class II (X7R, Z5U, Y5V) capacitors shall be made a special pre-conditioning before a test or a sequence of tests under the following conditions:
Exposure at 150 ±10
o
C for 1 hr, followed by setting the capacitor at room temperature for 24 ±1 hr.
*2 Capacitance is within specified tolerance; measured 1000 hours after date of manufacture because of capacitance aging of Class II capacitor.
2. E
NVIRONMENTAL
Test
Solderability
Test Conditions
IEC 384-10 4.11 /JIS C 5102 8.13
Solder 60 Sn/40 Pb, 235 ±5
o
C
Immersed for 5 secs.
IEC 384-10 4.10 /JIS C 5102 8.14
Immersed in solder bath at
260 ±5
o
C for 10 ±1 secs.
Recovery: 6 to 24 hrs. (NPO)
24 ±2 hrs. (X7R, Y5V)
IEC 384-10 4.12 /JIS C 5102 9.3
-55
o
C to +125
o
C, 5 cycles (NPO, X7R)
Duration: 30 mins.
Recovery: 6 to 24 hrs. (NPO)
24 ±2 hrs. (X7R)
IEC 384-10 4.15
1000 hrs. at maximum temperature
with x 1.5 rated voltage applied
Recovery: 6 to 24 hrs. (NPO)
24 ±2 hrs. (X7R, Y5V)
IEC 384-10 4.14 /JIS C 5102 9.5
500 hrs. at 40 ±2
o
C, 90-95% RH
Recovery: 6 to 24 hrs. (NPO)
24 ±2 hrs. (X7R, Y5V)
Post-Test Inspection Requirements
At least 75% of termination area should be well tinned
No visible damage
At least 75% of termination should be covered by solder
No visible damage
NPO
X7R
<
±0.5% or ±0.5pF
<
+10/-5%
C/C
whichever is greater
No visible damage
NPO
C/C
<
±1% or ±1pF
Resistance to
Soldering Heat
*1
Rapid Change of
Temperature
*2
Endurance
(Life Test)
*3
Humidity Test
(Damp heat,
steady state)
*4
IEC 384-10 4.8 /JIS C 5102 8.11.2
Capacitors mounted on a substrate,
a force of 5N applied perpendicular to
the plane of substrate and parallel to
the line joining the center of
terminations for 10 ±1 secs.
*1-4 Class II (X7R,Y5V) capacitors shall be made a special pre-conditioning before a test or a sequence of tests under the following
conditions: Exposure at 150 ±10
o
C for 1 hr, followed by setting the capacitor at room temperature for 24 ±1 hr.
Adhesion
whichever is greater
<
1.5 x initial requirement
D.F
I.R
0.25 x initial requirement
No visible damage
NPO
X7R
<
±2 0%
C/C
<
±2% or ±1pF
whichever is greater
<
2.0 x initial requirement
<
1.5 x initial requirement
D.F.
I.R.
0.25 x initial requirement
No visible damage
X7R
NPO
<
±2% or ±1pF
<
±10%
C/ C
whichever is greater
<
2.0 x initial requirement
<
1.5 x initial requirement
D.F.
I.R.
0.25 x initial requirement
No visible damage
<
<
<
<
<
<
Insulation Resistance (I.R.)
after
100G
Ω
or
10G
Ω
or
10G
Ω
or
100M
Ω
μF
whichever is less
2.5 x Rated Voltage
Y5V
<
+20/-10%
X7R
<
±10%
Y5V
<
±30%
Y5V
<
±30%
Multilayer Ceramic Chip Capacitors
Product Information
MERITEK
MLCC Product Information
Application
General Purpose
Series
Dielectric
NPO
X7R
Y5V
X7R
Size
0201,0402, 0603,0805,1206, 1210, 1812
0201,0402, 0603,0805,1206, 1210, 1812
0402, 0603,0805,1206, 1210, 1812
0402, 0603,0805,1206, 1210, 1812
0201,0402, 0603,0805,1206
0402, 0603,0805,1206, 1210, 1812
0612
0402, 0603,0805
0805,1206, 1210, 1812
0805,1206, 1210, 1808, 1812
0805,1206, 1210, 1808, 1812
0805,1206, 1210, 1812
0612 (4 x 0603)
0612 (4 x 0603)
0612 (4 x 0603)
1808
1808
Capacitance
0.5pF ~ 0.039μF
100pF ~ 1μF
0.01uF ~ 1μF
0.1uF ~ 22μF
0.027uF ~ 10μF
0.15uF ~ 47μF
0.01uF ~ 0.15μF
0.5pF ~ 3300μF
100pF ~ 1μF
10pF ~ 6800pF
100pF ~ 0.1μF
0.01uF ~ 0.68μF
10pF ~ 470pF
680pF ~ 0.1μF
0.022uF ~ 0.15μF
5pF ~ 680pF
150pF ~ 1500pF
Rated voltage
16V, 25V, 50V, 100V
10V, 16V, 25V, 50V, 100V
10V, 16V, 25V, 50V, 100V
6.3V, 10V, 16V, 25V, 50V
6.3V, 10V, 16V
6.3V, 10V, 16V, 25V, 35V, 50V
50V
16V, 25V, 50V, 100V
100V, 200V, 250V, 500V
200V, 250V, 500V, 630V, 1kV, 2kV, 3kV
200V, 250V, 500V, 630V, 1kV, 1.5kV, 2kV, 3kV
200V, 250V
50V
16V,25V,50V
16V,25V,50V
250Vac
250Vac
MA
High Capacitance
Low Inductance
High Q & Low ESR
Open-mode Design
High Voltage
MA
X5R
Y5V
MA
HQ
OP
X7R
NPO
X7R
NPO
HC
X7R
Y5V
NPO
Capacitor Arrays
CI
X7R
Y5V
Safety capacitors (X2/Y3)
MSC
NPO
X7R
Multilayer Ceramic Capacitors
MA
Low Inductance
Series
MERITEK
F
EATURES
•
•
•
Reversed geometry termination type
Low ESL, low ESR
Noise reduction for high frequency
P
ART NUMBER SYSTEM
MA
Meritek Series
Size
Dielectric
CODE
XR
X7R
0612
XR
103
K
500
Capacitance
Expressed in picofarads. First 2 digits are significant digits. Third digit denotes number
of zeros to follow. Use R for decimal point for values less than 10pF.
CODE
103
124
μF
0.01
0.12
Tolerance
B
C
±.10pF
±.25pF
For values less than 10 pF use C or D
CODE
D
±.50pF
G
±2%
J
±5%
Rated Voltage
2 significant digits + number of zeros.
CODE
250
500
25V
50V
X7R CAPACITANCE RANGE CHART
EIA CASE SIZE
0612
50
Working Voltage
Cap
(μF)
0.010
0.012
0.015
0.018
0.022
0.027
0.033
0.039
0.047
0.056
0.068
0.082
0.10
0.12
0.15
103
123
153
183
223
273
333
393
473
563
683
823
104
124
154
Some special values available upon request
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