Micrel, Inc.
3.3V 200MHz PRECISION SPREAD-
SPECTRUM CLOCK SYNTHESIZER
Precision Edge
SY89529L
Precision Edge
®
SY89529L
®
FEATURES
s
Low voltage, 3.3V power supply operation
s
200MHz precision LVPECL output from a low cost
16.66MHz crystal
s
0.5% spread-spectrum modulation control
s
> 7dB reduction in EMI with spread-spectrum
modulation
s
LVTTL/LVCMOS compatible control inputs
s
interfaces directly to a crystal
s
Precision PLL architecture ensures < 30ps
peak-to-peak, cycle-to-cycle output jitter
s
48%-to-52% precision duty cycle is ideal for double-
data-rate clocking applications
s
Available in low cost 32-pin TQFP and 28-pin SOIC
packages
DESCRIPTION
The SY89529L is a high-speed, precision PLL-based
LVPECL clock synthesizer with spread-spectrum
modulation control. With an external 16.66MHz crystal
providing a reference frequency to the internal PLL, the
differential PECL output frequency will be 200MHz with
< 30ps (20ps typ.) peak-to-peak, cycle-to-cycle output
jitter. The SY89529L spread-spectrum mode operates with
a 30kHz triangle modulation with 0.5% down-spread (+0.0%/
–0.5%). When spread-spectrum is activated, the output
signal is modulated which spreads the peak amplitudes
and, thus, decreases EMI (Electro-Magnetic Interference).
APPLICATIONS
s
High-speed synchronous systems
s
CPU clock
s
Multi-processor workstations and servers
s
Networking
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
Rev.: E
Amendment: /0
1
Issue Date: October 2005
Micrel, Inc.
Precision Edge
®
SY89529L
PACKAGE/ORDERING INFORMATION
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
TOP VIEW
SOIC
Z28-1
28 NC
27 VCC1
26 XTAL2
25 XTAL1
24 LOOP_REF
23 LOOP_FILTER
22 VCC_ANALOG
21 GND_ANALOG
20 NC
19 NC
18 VCC_OUT
17 FOUT
16 /FOUT
15 GND OUTPUT
Ordering Information
(1)
Part Number
SY89529LZC
SY89529LZCTR
(2)
SY89529LTC
SY89529LTCTR
(2)
SY89529LZH
(3)
SY89529LZHTR
(2, 3)
SY89529LTH
(3)
SY89529LTHTR
(2, 3)
Package Operating
Type
Range
Z28-1
Z28-1
T32-1
T32-1
Z28-1
Z28-1
T32-1
T32-1
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Package
Marking
SY89529LZC
SY89529LZC
SY89529LTC
SY89529LTC
Lead
Finish
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
SY89529LZH with
Pb-Free
Pb-Free bar-line indicator NiPdAu
SY89529LZH with
Pb-Free
Pb-Free bar-line indicator NiPdAu
SY89529LTH with
Pb-Free
Pb-Free bar-line indicator NiPdAu
SY89529LTH with
Pb-Free
Pb-Free bar-line indicator NiPdAu
SSC CONTROL(0) 10
SSC CONTROL(1) 11
GND_TTL 12
TEST INPUT 13
VCC_TTL 14
28-Pin SOIC (Z28-1)
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
/FOUT
GND OUTPUT
VCC_TTL
VCC_OUT
FOUT
TEST INPUT
GND_TTL
NC
NC
NC
GND_ANALOG
VCC_ANALOG
LOOP_FILTER
LOOP_REF
XTAL1
1
2
3
4
5
6
7
8
32 31 30
29
28 27 26
NC
25
24
23
22
TQFP
TOP VIEW
T32-1*
21
20
19
18
17
SSC CONTROL(1)
SSC CONTROL(0)
NC
NC
NC
NC
NC
NC
9
10 11
12 13 14
15 16
VCC1
XTAL2
NC
NC
NC
NC
NC
32-Pin TQFP (T32-1)
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
NC
2
Micrel, Inc.
Precision Edge
®
SY89529L
BLOCK DIAGRAM
INTERFACE
LOGIC
÷
4
PHASE DETECTOR
PLL
16.66MHz
XTAL
OSC
÷M
VCO
FOUT
÷N
/FOUT
200MHz
Spread
Spectrum
Control
Diagnostic
Control
SSC CTL
30-33kHz
Down Spread
0.5%
2
1
Control
TEST INPUT
Commands
SSC_CTL
(1:0)
00
01
10
11
Operational Modes
VCO
—
Run
Stop
Run
SSC
—
Run
Stop
Stop
FOUT, /FOUT
—
200MHz
TEST_I/O
200MHz
Reserved (Supplier Internal Test Mode)
Default SSC; Modulation Factor = 0.5%
Diagnostic Mode; (1MHz
≤
TEST INPUT
≤
200MHz)
No Spread-Spectrum
Table 1. SY89529L Control/Operational Modes
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
3
TEST
Micrel, Inc.
Precision Edge
®
SY89529L
PIN DESCRIPTIONS
Input/Output Pins
Pin Number
SOIC
25,26
Pin Number
TQFP
8, 9
Pin Name
XTAL1, XTAL2
I/O
Analog
Inputs
LVTTL
Inputs
Pin Function
These pins form an oscillator when connected to an external
crystal. Either series or parallel-resonant crystals are
acceptable. Connect directly to the device.
LVTTL-compatible spread-spectrum control pins. Data on
control pins maintain device control. For spread-spectrum
operation, leave SSC_0 and SSC_1 pins floating (default is
spread ON). To reconfigure the device, simply change the
SSC and the device will respond dynamically.
SSC_0 = 24kΩ pullup. SSC_1 = 24kΩ pulldown
Differential, LVPECL clock outputs. These outputs must be
terminated to V
CC
–2V. (see Figure 6)
Used for the R//C PLL loop filter. (see Figure 2.)
Provides the reference voltage for the PLL. (see Figure 2).
Pin is used for test and debug purposes. Is intended to be
left floating in production environment. Programmed as
input in PLL-bypass mode. Pin includes an internal 24kΩ
pullup resistor.
10, 11
23, 24
SSC Control (0:1)
16, 17
23
24
13
30, 31
6
7
27
FOUT, /FOUT
LOOP_FILTER
LOOP_REF
TEST INPUT
Differential
Analog I/O
Analog I/O
LVTTL
Inputs
Power Supply Pins
Pin Number
SOIC
14, 27
Pin Number
TQFP
10, 28
Pin Name
V
CC1
, V
CC_TTL
I/O
Logic
Power
Pin Function
3.3V LVTTL core logic power-supply pins. Connect each
pin directly to the logic-supply plane and use proper
bypassing at each pin as close to the pin as possible; Ferrite
bead in parallel with 1µF//0.01µF capacitors. (see Figure 5
for typical bypass circuit.)
3.3V PLL core supply pin. Must be a noise free supply.
Bypass as close to the pin as possible; ferrite bead in
parallel with 1µF//0.01µF capacitors.
(
see Figure 5 for
typical bypass circuit.)
This is the positive power supply reference for the LVPECL
outputs (FOUT and /FOUT). See Figure 5 for typical bypass
circuit.
This is the ground pin for for the TTL control logic. Normally
connected to the logic ground.
This is the ground pin for the PLL Core. Normally connected
to a quiet, noise-free ground plane for low jitter perfomance.
Ground for differential outputs. Normally connected to the
logic ground plane.
22
5
ANALOG_ V
CC
Power
PLL
18
32
V
CC_OUT
Output
Power
Logic
Analog
GND
Output
GND
12
21
15
26
4
29
GND_TTL
GND_ANALOG
GND_OUTPUT
No Connect Pins
Pin Number
SOIC
1, 2, 3, 4, 5
6, 7, 8, 9, 19
20, 28
Pin Number
TQFP
1, 2, 3, 11, 12, 13
14, 15, 16, 17, 18
19, 20, 21, 22, 25
Pin Name
NC
I/O
No
Connect
Pin Function
Pins are high-impedance, low leakage and are not used by
internal circuits of the device. These pins are intended to be
left floating in production.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY89529L
FUNCTIONAL DESCRIPTION AND TEST MODES
Introduction
The SY89529L supports three operational modes, as shown
in Table 1, page 2. The three modes are spread-spectrum
clocking (SSC), non-spread-spectrum clock, and a test mode
dynamically controlled with the SSC_Control pins. Unlike
other synthesizers, the SY89529L can change spread-
spectrum operation on the fly.
In SSC mode, the output clock is modulated (30KHz,
triangle waveform) in order to achieve a reduction in EMI. In
the PLL-bypass test mode, the PLL is disconnected as the
source to the differential output, thus allowing an external
source to be connected to the TEST INPUT pin. This is useful
for in-circuit testing by enabling the differential output to be
driven at a lower frequency.
Crystal Input and Oscillator Interface
The SY89529L features a fully integrated on-board oscillator
to minimize system implementation costs. The oscillator is a
series resonant, multivibrator type design, and thus, a series-
resonant crystal is preferred, but not required.
A parallel-resonant crystal can be used with the SY89529L
with only a minor error in the desired frequency. A parallel-
resonant mode crystal used in a series resonant circuit will
exhibit a frequency of oscillation a few hundred ppm lower
than specified, a few hundred ppm translates to KHz
inaccuracies. In a general computer application this level of
inaccuracy is immaterial.
As the oscillator is somewhat sensitive to loading on its
inputs, the user is advised to mount the crystal as close to the
SY89529L as possible to avoid any board level parasitics. In
addition, trace lengths should be matched. Figure 1 shows
how to interface with a crystal. Table 2 illustrates the crystal
specifications. If a start-up problem occurs, consider adding a
10pf capacitor across XTAL1 and XTAL2.
SY89529L
XTAL2
(Pin 26, SOIC)
XTAL1
(Pin 25, SOIC)
XTAL
16.666MHz
Optional
Quartz Crystal Selection:
(1) Raltron Series Resonant: AS-16.666-S-SMD-T-MI
(2) Raltron Parallel Resonant: AS-16.666-18-SMD-T-MI
Figure 1. Crystal Interface
Loop Filter Design
The filter for any Phase Locked Loop (PLL) based device
deserves special attention. SY89529L provides filter pins for
an external filter. A simple three-component passive filter is
required for achieving ultra low jitter. Figure 2 shows the
recommended three-components. Due to the differential
design, the filter is connected between LOOP_FILTER and
LOOP_REF pins. With this configuration, extremely high
supply noise rejection is achieved. It is important that the filter
circuit and filter pins be isolated from any non-common mode
coupling plane.
560Ω
0.47µF
1000pF
Loop
Filter
Loop
Reference
Figure 2. External Loop Filter Connection
Output Frequency: 16.666MHz
Mode of Oscillation: Fundamental
Min.
Frequency Tolerance @25°C
Frequency Stability over 0°C to 70°C
Operating Temperature Range
Storage Temperature Range
Aging (per yr/1st 3yrs)
Load Capacitance
Equivalent Series Resistance (ESR)
Drive Level
—
—
–20
–55
—
—
—
—
Typ.
±30
±50
—
—
—
18 (or series)
—
100
Max.
±50
±100
+70
+125
±5
—
50
—
Unit
ppm
ppm
°C
°C
ppm
pF
Ω
µW
Table 2. Quartz Crystal Oscillator Specifications
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
5
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