Product Information
High Voltage SLA6820M and SMA6820MP Series
Driver ICs for 3-Phase DC Motor Applications
Introduction
The SLA6820M and SMA6820MP Series power packages
incorporate all of the necessary power control components
to configure the main circuit of an inverter power module
(IPM). These products are especially suitable for driving the
inverters of low-capacity motors, such as those used in 100
to 200 V fans for air conditioners.
Features and benefits include the following:
▪
Built-in pre-driver ICs and three bootstrap diodes as a
high-side drive power supply
▪
CMOS-compatible input (5 V)
▪
High-side gate driver using bootstrap circuit or floating
power supply
▪
One pin for 7.5 V regulator output
▪
Built-in protection circuit for controlling power supply
voltage drop (UVLO)
▪
Built-in overtemperature detection circuit (TD)
▪
Fault signal output during operation of protection circuit
▪
Output current up to 2.5 A continuous
▪
Small SIP (SLA and SMA, 24 pins)
Leadform 2451
(SMA)
Leadform 2452
(SMA)
Functional Description
The functional block diagram is shown in figure 2. High
voltage power and 15 VDC are input between VBB and
LS1/LS2, between VCC1 and COM1, and between VCC2
and COM2. The on/off signals of the power MOSFETs
are operated by six signals: HIN1, HIN2, HIN3, LIN1,
LIN2, and LIN3. These input signals are positive logic (the
MOSFET turns on at V
xINx
= high). The boot capacitors are
connected between VB1 and U, VB2 and V, and VB3 and
W1, as the high voltage power source.
Product Lineup
Type
SLA6826M
SLA6827M
SLA6828M
SMA6821MP
SMA6822MP
SMA6823MP
MOSFET
Rating
250 V / 2 A
500 V / 1.5 A
500 V / 2.5 A
250 V / 2 A
500 V / 1.5 A
500 V / 2.5 A
Input Voltage
(VAC)
120
230
230
120
230
230
Heatsink
Pad
Yes
Yes
Yes
No
No
No
Leadform 2175
(SLA)
Leadform 2171
(SLA)
Figure 1. SLA6820M and SMA6820MP Series packages are fully
molded SIPs, offering compact configurations both horizontal mount
(leadforms 2451 and 2175) and vertical mount (leadforms 2452 and
2171). The SLA packages feature an aluminum heatsink pad for
mounting external heatsinks.
Contents
Introduction
Functional Description
Protection Functions
Application Circuit Recommendations
Electrical Characteristics Data
1
1
7
10
10
SLASMA6820Mx-AN, Rev. 2
VB1
VB2
VB3
VD
VBB 1
VCC1
UVLO
HIN1
HIN2
HIN3
COM1
U
V
W1
W2
Input
Logic
UVLO
UVLO
UVLO
VBB 2
High-Side
Level Shift Driver
VCC 2
VREG
LIN1
LIN2
LIN3
COM 2
FO
Heatsink Tab
(SLA only)
7.5V
Reg.
UVLO
Input
Logic
Overtemperature
Detect
Low-Side
Driver
LS2
LS1
Figure 2. SLA6820M and SMA6820MP Series Functional Block Diagram. These
devices support high-side and low-side three-phase MOSFET output drivers.
Terminal List
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Tab
Name
VB1
VB2
VD
VB3
VCC1
COM1
HIN3
HIN2
HIN1
VBB1
VBB2
W1
V
W2
LS2
VREG
LS1
LIN3
LIN2
LIN1
COM2
FO
VCC2
U
–
Function
High-side bootstrap terminal (U phase)
High-side bootstrap terminal (V phase)
Bootstrap diodes anode terminal
High-side bootstrap terminal (W phase)
High-side logic supply voltage
High-side logic GND terminal
High-side input terminal (W phase)
High-side input terminal (V phase)
High-side input terminal (U phase)
Main supply voltage 1 (connect to VBB2 externally)
Main supply voltage 2 (connect to VBB1 externally)
Output of W phase (connect to W2 externally)
Output of V phase
Output of W phase (connect to W1 externally)
Low-side emitter terminal (connect to LS1 externally)
Internal regulator output terminal
Low-side emitter terminal (connect to LS2 externally)
Low-side input terminal (W phase)
Low-side input terminal (V phase)
Low-side input terminal (U phase)
Low-side GND terminal
Overtemperature and low-side UVLO fault-signal output
Low-side logic supply voltage
Output of U phase
(SLA only) Electrically isolated heatsink/external heatsink
mounting tab
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
The protection functions, including overtemperature detection
(at abnormal ambient temperature, overload, and so forth), and
undervoltage of low control power supply voltage (at instanta-
neous fall, and so forth) are built-in and when any of these func-
tions is operated, it can be monitored at the fault output terminal,
FO.
U, V, W1, and W2
These are the output terminals that are con-
nected to the motor. W1 and W2 must be tied together externally
on the printed circuit board (PCB) with a trace of minimum
length.
VD, VB1, VB2, and VB3
Power supply terminals for driving
the high-side MOSFETs.
As shown in figure 4, a bootstrap capacitor, CBOOTx, must be
connected between VB1 and U, VB2 and V, and VB3 and W. A
bootstrap capacitor circuit is required on each high-side bridge,
because they operate independently of each other.
The bootstrap capacitors, CBOOTx, must be charged at startup.
Before charging CBOOT, the corresponding low-side MOSFET
must be turned on. The IC has a built-in 22
Ω
±20% serial resis-
tor and a bootstrap diode (600 V / 1 A). In applications in which
22
Ω
is not sufficient, an external resistor can be added between
V
CC
and the VD pin.
The following factors should be considered when determining the
parameters of the bootstrap circuit. First, the optimal value for
the bootstrap capacitor, CBOOT, varies according to the driving
method (modulation method and output frequency), the switching
frequency (carrier frequency), the modulation ratio (duty cycle),
and the gate input capacity of the driving MOSFETs.
The following table provides an example for three-phase modula-
tion with 90% duty cycle:
Structural Description
The external configurations of the device packages are shown in
figure 1. The device cases are molded epoxy resin. The surface of
each package has branding that includes the part number and lot
number.
As shown in figure 3, the backside of SLA6820M series provides
an aluminum heatsink tab. It is electrically isolated from the
leadframe. It can be attached to external heatsinks by means of
one or two M3 screws.
The devices each have 11 embedded die, including six power
MOSFETs, two pre-driver ICs, and three bootstrap diodes. These
die are mounted on a copper leadframe and connected with gold
wire between die and from die to leadframe (figure 3).
Terminal Descriptions
A summary description of the function of the various terminals is
given in the Terminal List table. Pin 1 for the package appears in
figure 5. This section provides detailed functional descriptions of
the individual pins.
VBB
VD
Epoxy resin case
Gold wire
Copper leadframe
High Side
Drive Circuit
Resin isolation layer
V
CC
Aluminum heatsink
Low Side
Drive Circuit
LS
Figure 3. SLA Package Cross-section View
Figure 4. Connection of Bootstrap Capacitor. There is a separate CBOOT
capacitor for each of the three phases.
U,V,W
To Motor
CBOOT
Die
CBOOT
charge current
VBx
V
BB
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Gate protrusion
31.3 ±0.2
31 ±0.2
4 ±0.2
(A)
2X Gate protrusion
1.2 ±0.1
BSC
10.2 ±0.2
3 ±0.5
BSC
2.2 ±0.7
BSC
R1
REF
2X Exposed
tie bar
4.4
REF
1
C
0.7
+0.15
– 0.05
0.6 +0.15
– 0.05
1.27 ±0.1 A
1.27 ±0.6 B
2.2 ±0.7
BSC
0.55 +0.2
– 0.1
Gate protrusion
31.3 ±0.2
31 ±0.2
4 ±0.2
(B)
2X Gate protrusion
10.2 ±0.2
1.2 ±0.1
BSC
2X Exposed
tie bar
5 ±0.5
9.5 +0.7
– 0.5
R1
REF
0.5 +0.15
– 0.05
4.5
REF
1
1.27 ±0.5 A
0.6 +0.15
– 0.05
4.5 ±0.5
Figure 5. Package Outline Drawings. (A) LF2451, L-bend horizontal mount, (B) LF2452, vertical mount.
31.3 ±0.1
31 ±0.2
24.4 ±0.2
16.4 ±0.2
Gate protrusion
0.6
1.7 ±0.1
Ø3.2 ±0.15
4.8 ±0.2
Exposed
heatsink pad
(A)
Ø3.2 ±0.15
2X Gate protrusion
16 ±0.2 B
12.9 ±0.2
9.9 ±0.1
Branding Area
2.45 ±0.1
BSC
3 ±0.3
BSC
2.2 ±0.6
BSC
4.4
REF
0.6 +0.2
– 0.1
R1
REF
2X Exposed
tie bar
1.27 ±0.2 A
2.2 ±0.6
BSC
0.5 ±0.1
31.3 ±0.2
31 ±0.2
24.4 ±0.2
16.4 ±0.2
Gate protrusion
0.6
1.7 ±0.1
Ø3.2 ±0.15
4.8 ±0.2
Exposed
heatsink pad
(B)
Ø3.2 ±0.15
2X Gate protrusion
16 ±0.2 B
12.9 ±0.2
9.9 ±0.2
Branding Area
2X Exposed
tie bar
2.45 ±0.2
BSC
5 ±0.5
9.5 +0.7
– 0.5
R1
REF
+0.15
0.5 – 0.05
4.5
REF
0.6 +0.15
– 0.05
1.27 ±0.7 A
4.5 ±0.7
Figure 6. Package Outline Drawings. (A) LF2175, L-bend horizontal mount, (B) LF2171, vertical mount.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
SW Frequency
(kHz)
3
5
10
20
Recommended
Capacitor Value
(μF)
2.2
1
0.47
0.22
the built-in pre-driver IC. COM1 and COM2 must be connected
together externally on the application PCB. Varying electric
potential may become a cause of improper operation, so careful
attention is required to the design of connection points and mini-
mizing the length of the PCB traces.
HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3
These are the input
terminals for controlling driver output to the motor. The IC uses a
5 V, CMOS Schmitt trigger circuit configuration. The input logic
is active high, and internal pull-down resistors are provided. The
value for the pull-down resistors is 100 kΩ on both the HIN side
and the LIN side, as shown in figure 7, but an additional input
filter (RC filter) or pull-down resistor should be considered in
case the application has excessive noise or the input voltage is
unstable.
VBB1 and VBB2
These are the main power supply termi-
nals. The VBB1 and VBB2 terminals are connected internally,
but it is recommended to also tie them together externally by a
short-circuit connection on the PCB, in order to decrease wiring
impedance. A snubber capacitor (0.01
μF)
should be placed near
each of VBB1 and VBB2, connecting to the corresponding COM
terminal, for suppressing surge voltages.
LS1 and LS2
These are source terminals for the low-side
MOSFETs. LS1 and LS2 must be connected together externally
on the PCB. When connecting a shunt resistor to these terminals,
such as for overcurrent sensing, the length of the trace between
the IC terminals and the shunt resistor must be as short as prac-
ticable. Greater length increase the susceptibility to improper
operation due to noise.
VREG
This is the terminal for the 7.5 V / 35 mA output to an
external current regulator. Using an external regulation function
is an important consideration for stabilizing the supply voltage.
For two-phase modulation, or 120°C current-carrying topology,
several tens of times the values above would be required due to
the longer on-time.
Please select capacitors considering the conditions used. When
starting-up the IC, the low-side must be turned on first, and the
boot capacitor needs to be charged sufficiently. The adequacy of
the values shown above needs to be validated by testing in the
actual application. Because the VB1, VB2, and VB3 pins connect
to UVLO circuits, these terminal voltages must be set such that
the UVLO protection does not operate.
VCC1 and VCC2
These are the IC logic supply terminals for
the built-in pre-driver IC. VCC1 and VCC2 must be connected
together externally on the application PCB. To avoid improper
operation because of supply ripples or other factors, a ceramic
capacitor of approximately 0.1
μF
must be installed near the pins.
Also, there is the possibility of permanent damage to the IC if a
voltage greater than 20 V is applied to the IC. To protect against
this, adding a Zener diode (V
Z
= 20 to 23 V) is recommended.
VCC1 and VCC2 have a built-in UVLO circuit, so these terminal
voltages need to be regulated within the rated range, so that the
UVLO protection does not operate.
COM1 and COM2
These are the logic ground terminals for
5V
HIN
LIN
2 kΩ
2 kΩ
COM
100 kΩ
Figure 7. HINx and LINx Terminals Internal Equivalent Circuit
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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