Rev.3.2
_10
BATTERY PROTECTION IC
FOR 3-SERIAL-CELL PACK
S-8233A Series
The S-8233A Series is a series of lithium-ion rechargeable battery
protection ICs incorporating high-accuracy voltage detection circuits and
delay circuits. It is suitable for a 3-serial-cell lithium-ion battery pack.
Features
(1)
Internal high-accuracy voltage detection circuit
Over charge detection voltage
4.10
±
0.05 V to 4.35
±
0.05 V
50 mV- step
Over charge release voltage
3.85
±
0.10 V to 4.35
±
0.10 V
50 mV- step
(The over charge release voltage can be selected within the range where a difference from over
charge detection voltage is 0 V to 0.3 V)
Over discharge detection voltage
2.00
±
0.08 V to 2.70± 0.08 V
100 mV- step
Over discharge release voltage
2.00
±
0.10 V to 3.70± 0.10 V
100 mV - step
(The over discharge release voltage can be selected within the range where a difference from over
discharge detection voltage is 0 V to 1.0 V)
Over current detection voltage 1
0.15
±0.015
V to 0.5
±0.05
V
50 mV-step
(2)
(3)
(4)
(5)
(6)
(7)
(8)
High input-voltage device (absolute maximum rating: 26 V)
Wide operating voltage range:
2 V to 24 V
The delay time for every detection can be set via an external capacitor.
Three over current detection levels (protection for short-circuiting)
Internal charge/discharge prohibition circuit via the control terminal
The function for charging batteries from 0 V is available.
Low current consumption
Operation
50
µA
max. (+25
°C)
Power-down
0.1
µA
max. (+25
°C)
Applications
Lithium-ion rechargeable battery packs
Packages
Package Name
14-Pin SOP
16-Pin TSSOP
Package
FE014-A
FT016-A
Drawing Code
Tape
FE014-A
FT016-A
Reel
FE014-A
FT016-A
Seiko Instruments Inc.
1
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233A Series
Block Diagram
Rev.3.2
_10
VCC
Reference
voltage 1
+
−
Battery 1
Over charge
Over current
2,3 delay
circuit
Over current
detection
circuit
VMP
CD1
+
−
Battery 1
Over discharge
Over current1,
delay circuit
COVT
VC1
Battery 1
Over charge
+
−
Battery 2
Over charge
Over discharge
delay circuit
CDT
Control
Logic
Over charge
delay circuit
CD2
+
Battery 2
Over discharge
Reference
voltage 2
−
CCT
VC2
Battery 2
Over charge
+
−
Battery 3
Over charge
DOP
CD3
+
Battery 3
Over discharge
Reference
voltage 3
−
COP
VSS
Battery 3
Over charge
Floating
detection circuit
CTL
Figure 1
Remark
The delay time for over current detection 2 and 3 is fixed by an internal IC circuit. The delay time
cannot be changed via an external capacitor.
2
Seiko Instruments Inc.
Rev.3.2
_10
Product Name Structure
1. Product name
x
S−8233A
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233A Series
xx
−
TB
IC direction in tape specifications
*1
Package name (abbreviation)
FE: 14-Pin SOP
FT: 16-Pin TSSOP
Serial code
Assigned from A to Z in alphabetical order
*1.
Refer to the taping specifications.
Seiko Instruments Inc.
3
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233A Series
2. Product name list
・14-Pin
SOP
Table 1
Product name /
Parameter
S-8233ACFE-TB
S-8233ADFE-TB
S-8233AEFE-TB
S-8233AFFE-TB
S-8233AGFE-TB
S-8233AIFE-TB
S-8233AJFE-TB
S-8233AKFE-TB
S-8233ALFE-TB
S-8233AMFE-TB
S-8233ANFE-TB
S-8233AOFE-TB
S-8233APFE-TB
Overcharge
Overcharge
detection voltage release voltage
V
CU
V
CD
4.25±0.05 V
4.05±0.10 V
4.10±0.05 V
4.25±0.05 V
4.35±0.05 V
4.25±0.05 V
4.25±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.25±0.05 V
4.10
*1
Rev.3.2
_10
Overdischarge
detection voltage
V
DD
2.00±0.08 V
2.00±0.08 V
2.30±0.08 V
2.40±0.08 V
2.40±0.08 V
2.30±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.70±0.08 V
2.70±0.08 V
Overdischarge
release voltage
V
DU
2.30±0.10 V
2.30±0.10 V
2.70±0.10 V
2.70±0.10 V
2.70±0.10 V
3.00±0.10 V
2.70±0.10 V
2.70±0.10 V
2.70±0.10 V
2.70±0.10 V
2.40±0.10 V
2.70±0.10 V
3.00±0.10 V
3.00±0.10 V
Overcurrent
0 V battery
detection voltage1
charge function
V
IOV1
0.20±0.02 V
－
－
0.20±0.02 V
0.15±0.015 V
0.50±0.05 V
0.40±.0.04 V
0.15±0.015 V
0.30±0.03 V
0.15±0.015 V
0.40±0.04 V
0.30±0.03 V
0.15±0.015 V
0.15±0.015 V
0.30±0.03 V
0.30±0.03 V
－
Available
Available
－
－
－
Available
Available
Available
Available
Available
Available
4.10±0.10 V
4.05±0.10 V
4.05±0.10 V
4.10±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
*1
S-8233AQFE-TB
4.25±0.05 V
4.25
*1.
Without over charge detection hysteresis.
Remark
Please contact the SII marketing department for the products with the detection voltage value other
than those specified above.
・16-Pin
TSSOP
Table 2
Product name /
Parameter
S-8233ACFT-TB
S-8233ADFT-TB
S-8233AEFT-TB
S-8233AFFT-TB
S-8233AGFT-TB
S-8233AIFT-TB
S-8233AJFT-TB
S-8233AKFT-TB
S-8233ALFT-TB
S-8233AMFT-TB
S-8233ANFT-TB
S-8233AOFT-TB
S-8233APFT-TB
Overcharge
Overcharge
detection voltage release voltage
V
Cu
V
CD
4.25±0.05 V
4.05±0.10 V
4.10±0.05 V
4.25±0.05 V
4.35±0.05 V
4.25±0.05 V
4.25±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.35±0.05 V
4.25±0.05 V
4.10
*1
Overdischarge
detection voltage
V
DD
2.00±0.08 V
2.00±0.08 V
2.30±0.08 V
2.40±0.08 V
2.40±0.08 V
2.30±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.40±0.08 V
2.70±0.08 V
2.00±0.08 V
Overdischarge
release voltage
V
DU
2.30±0.10 V
2.30±0.10 V
2.70±0.10 V
2.70±0.10 V
2.70±0.10 V
3.00±0.10 V
2.70±0.10 V
2.70±0.10 V
2.70±0.10 V
2.70±0.10 V
2.40±0.10 V
2.70±0.10 V
3.00±0.10 V
2.70±0.10 V
Overcurrent
0 V battery
detection voltage1
charge function
V
IOV1
0.20±0.02 V
－
－
0.20±0.02 V
0.15±0.015 V
0.50±0.05 V
0.40±.0.04 V
0.15±0.015 V
0.30±0.03 V
0.15±0.015 V
0.40±0.04 V
0.30±0.03 V
0.15±0.015 V
0.15±0.015 V
0.30±0.03 V
0.30±0.03 V
－
Available
Available
－
－
－
Available
Available
Available
Available
Available
Available
4.10±0.10 V
4.05±0.10 V
4.05±0.10 V
4.10±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
4.05±0.10 V
S-8233ARFT-TB
4.35±0.05 V
4.05±0.10 V
*1.
Without over charge detection hysteresis.
Remark
Please contact the SII marketing department for the products with the detection voltage value other
than those specified above.
4
Seiko Instruments Inc.
Rev.3.2
_10
Pin Assignment
14-Pin SOP
Top view
DOP
COP
VMP
COVT
CDT
CCT
VSS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
CD1
VC1
CD2
VC2
CD3
CTL
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233A Series
Figure 2
Table 3
Pin No. Symbol
Pin description
1
DOP Connects FET gate for discharge control (CMOS output)
2
COP Connects FET gate for charge control (Nch open-drain output)
3
VMP Detects voltage between VCC to VMP(Over current detection pin)
4
COVT Connects capacitor for over current detection1delay circuit
5
CDT Connects capacitor for over discharge detection delay circuit
6
CCT Connects capacitor for over charge detection delay circuit
7
VSS Negative power input, and connects negative voltage for battery 3
8
CTL Charge/discharge control signal input
9
CD3 Battery 3 conditioning signal output
10
VC2 Connects battery 2 negative voltage and battery 3 positive voltage
11
CD2 Battery 2 conditioning signal output
12
VC1 Connects battery 1 negative voltage and battery 2 positive voltage
13
CD1 Battery 1 conditioning signal output
14
VCC Positive power input and connects battery 1 positive voltage
Table 4
Pin No. Symbol
Pin description
1
DOP Connects FET gate for discharge control (CMOS output)
*1
2
NC
No connection
3
COP Connects FET gate for charge control (Nch open-drain output)
4
VMP Detects voltage between VCC to VMP(Over current detection pin)
5
COVT Connects capacitor for over current detection1 delay circuit
6
CDT Connects capacitor for over discharge detection delay circuit
7
CCT Connects capacitor for over charge detection delay circuit
8
VSS Negative power input, and connects negative voltage for battery 3
9
CTL Charge/discharge control signal input
10
CD3 Battery 3 conditioning signal output
11
VC2 Connects battery 2 negative voltage and battery 3 positive voltage
12
CD2 Battery 2 conditioning signal output
13
VC1 Connects battery 1 negative voltage and battery 2 positive voltage
CD1 Battery 1 conditioning signal output
14
*1
15
NC
No connection
16
VCC Positive power input and connects battery 1 positive voltage
*1.
The NC pin is electrically open. The NC pin can be connected to
VCC or VSS.
16-Pin TSSOP
Top view
DOP
NC
COP
VMP
COVT
CDT
CCT
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
NC
CD1
VC1
CD2
VC2
CD3
CTL
Figure 3
Seiko Instruments Inc.
5
FPGA/CPLD
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