1CY M74 P43 4B/4 35B
PRELIMINARY
CYM74P430B/431B
CYM74P434B/435B
Intel™ 82430FX, HX, VX PCIset
Pipelined L2 Cache Modules
Features
•
Secondary cache modules that are ideal for the Intel
82430FX, 82430HX, and 82430VX chip sets
•
Complies with Intel COAST 3.0 cache module specifi-
cations
•
High-performance cache modules based on synchro-
nous pipelined 32Kx32 data BSRAM
•
All modules contain series damping resistors on the
data lines to improve system signal quality
•
Operates at 50, 60, and 66 MHz
•
160-position connector is compatible with all four Key-
ing Options defined in COAST 3.0.
•
3.3V compatible inputs/data outputs
The CYM74P430B/431B/434B/435B modules are based on
industry standard 32Kx32 synchronous pipelined BSRAM.
The CYM74P430B (256-Kbyte) and CYM74P431B
(512-Kbyte) are high performance modules compatible with all
three chipsets.
The CYM74P434B (256-Kbyte) and CYM74P435B
(512-Kbyte) are high performance modules with extended
cacheability for systems based on the 82430HX chipset.
Multiple ground pins and on-board decoupling capacitors en-
sure high performance with maximum noise immunity. All
modules have series damping resistors on the data lines.
All components on the cache modules are surface mounted
on a multi-layer epoxy laminate (FR-4) substrate. The contact
pins are plated with 150 micro-inches of nickel covered by 30
micro-inches of gold.
Functional Description
The cache modules are designed for Intel P54C/P55C sys-
tems with the 82430FX, 82430HX, and 82430VX chip sets.
Logic Block Diagram
Note:The tag rams are 8Kx8 for CYM74P430B/434B
and 32Kx8 for CYM74P431B/435B
WE
CYM74P430B/434BA
17:3
CYM74P431B/435BA
18:3
A
CE
WE
A
CYM74P430B/434BECS
1
CYM74P431B/435BGND
CLK
1
CLK
0
CK
D
31:0
A
17:3
CWE
7:0
ADSP
ADSC
ADV
CCS
COE
GWE
BWE
CYM74P430B/434BECS
1
CYM74P431B/435BA
18
BOSEL
V
CC3
CWE
3:0
A
14:0
BW
3:0
ADSP
ADSC
ADV
CS
1
OE
GWE
BWE
CS
2
MODE
CS
2
32Kx32
CWE
7:4
D
31:0
A
14:0
BW
3:0
ADSP
ADSC
ADV
CS
1
OE
GWE
BWE
CS
2
MODE
CS
2
32Kx32
GND
A
18
CWE
3:0
CK
D
31:0
D
63:32
A
14:0
BW
3:0
ADSP
ADSC
ADV
CS
1
OE
GWE
BWE
CS
2
MODE
CS
2
32Kx32
CWE
7:4
CK
D
31:0
D
31:0
CE
D
7:0
D
2:0
CYM74P430B/434B
CYM74P431B/435B
PD
3
NC
GND
PD
2
GND
NC
[1]
PD
1
NC
GND
PD
0
NC
GND
Extended cache ability only CYM74P434B/435B
TIO
10:8
ECS
2
TIO
7:0
TWE
CYM74P430B/434BECS
1
CYM74P431B/435BNC
CYM74P431B/435B ONLY
D
63:0
CK
D
31:0
A
14:0
BW
3:0
ADSP
ADSC
ADV
CS
1
OE
GWE
BWE
CS
2
MODE
CS
2
32Kx32
D
63:32
Note:All modules have series damping resistors on each data line between the SRAM and the module connector
Intel is a trademark of Intel Corporation.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
• CA 95134 •
408-943-2600
December 1995 – Revised June 1996
PRELIMINARY
Selection Guide
CYM74P430B/431B
CYM74P434B/435B
Synchronous Pipelined Cache Modules
Part Number
Cache Size
System Clock
(MHz)
Data SRAM t
CO
w/0 pF loading
Tag SRAM t
AA
50
13.5 ns
20 ns
74P430B−50
74P430B−60
256 KB
60
10 ns
15 ns
66
8.5 ns
15 ns
50
13.5 ns
20 ns
60
10 ns
15 ns
74P430B−66
74P431B−50
74P431B−60
512 KB
66
8.5 ns
15 ns
74P431B−66
Synchronous Pipelined Cache Modules
with Extended Cacheability
Part Number
Cache Size
System Clock
(MHz)
Data SRAM t
CO
w/0 pF loading
Tag SRAM t
AA
50
13.5 ns
20 ns
74P434B−50
74P434B−60
256 KB
60
10 ns
15 ns
66
8.5 ns
15 ns
50
13.5 ns
20 ns
60
10 ns
15 ns
74P434B−66
74P435B−50
74P435B−60
512 KB
66
8.5 ns
15 ns
74P435B−66
2
PRELIMINARY
Pin Configuration
Dual Read–Out SIMM (DIMM)
Top View
GND
TIO
1
TIO
7
TIO
5
TIO
[1]
(CYM74P434B,CYM74P435B)TIO
3
9
V
CC5
[1]
(CYM74P434B,CYM74P435B)TIO
10
ADV
GND
COE
CWE
5
CWE
7
CWE
1
V
CC5
CWE
3
NC
NC
GND
RSVD
A
4
A
6
A
8
A
10
V
CC5
A
17
GND
A
9
A
14
A
15
RSVD
PD
0
PD
2
[2]
BOSEL
GND
CLK
0
GND
D
63
V
CC5
D
61
D
59
D
57
GND
D
55
D
53
D
51
D
49
GND
D
47
D
45
D
43
V
CC5
D
41
D
39
D
37
GND
D
35
D
33
D
31
V
CC
D
29
D
27
D
25
GND
D
23
D
21
D
19
V
CC5
D
17
D
15
D
13
GND
D
11
D
9
D
7
V
CC5
D
5
D
3
D
1
GND
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
CYM74P430B/431B
CYM74P434B/435B
GND
TIO
0
TIO
2
TIO
6
TIO
4
[1]
TIO
8
(CYM74P434B, CYM74P435B)
V
CC3
TWE
ADSC
GND
CWE
4
CWE
6
CWE
0
CWE
2
V
CC3
CCS
GWE
BWE
GND
A
3
A
7
A
5
A
11
A
16
V
CC3
A
18
(CYM74P431B,CYM74P435B)
GND
A
12
A
13
ADSP
ECS
1
ECS
2
PD
1
PD
3
GND
CLK
1
(CYM74P431B,CYM74P435B)
GND
D
62
V
CC3
D
60
D
58
D
56
GND
D
54
D
52
D
50
D
48
GND
D
46
D
44
D
42
V
CC3
D
40
D
38
D
36
GND
D
34
D
32
D
30
V
CC3
D
28
D
26
D
24
GND
D
22
D
20
D
18
V
CC3
D
16
D
14
D
12
GND
D
10
D
8
D
6
V
CC3
D
4
D
2
D
0
GND
Notes:
1. For the
CYM74P434B
and
CYM74P435B
TIO
8
and TIO
9
are pulled up on the mod-
ule through a 8.2KΩ resistor. TIO
10
is
pulled to ground on the module through
an 8.2KΩ resisitor.
2. BOSEL is pulled up through a 4.7
KΩ
resistor
on the module for backward compatible opera-
tion in systems not supporting BOSEL opera-
tion.
3
PRELIMINARY
Pin Definitions
Common Signals
V
CC5
V
CC3
GND
A
18:3
COE
CWE
7:0
BWE
GWE
D
63:0
TIO
7:0
TIO
10:8
TWE
ADSP
ADSC
ADV
CCS
ECS
1
ECS
2
CLK
1:0
PD
3:0
BOSEL
5V Supply
3.3V Supply
Ground
Addresses from processor
Output Enable
Byte Write Selects
Byte Write Enable
Global Write Enable
Data lines from processor
Tag data bits
Description
CYM74P430B/431B
CYM74P434B/435B
Extended cacheability tag data bits for CYM74P434B or CYM74P435B
Tag Write Enable signal
Processor Address Strobe
Cache Controller Address Strobe
Burst Address Advance
Cache Chip Select
256-Kbyte Expansion Chip Select input pin (CYM74P430B or CYM74P434B)
256-Kbyte Expansion Chip Select output pin (CYM74P430B or CYM74P434B)
Clock signals, CLK
1
is not used on CYM74P430B or CYM74P434B
Presence Detect output pins
Burst Order Select. When LOW, linear burst sequence is selected. When HIGH, inter-
leaved burst sequence is selected. If not driven (a no-connect on the motherboard) a
pull-up resistor on the module will default to interleaved burst sequence.
Reserved.
Signal not connected on module.
RSVD
NC
Presence Detect Pins
PD
3
CYM74P430B, CYM74P434B
CYM74P431B, CYM74P435B
NC
GND
PD
2
GND
NC
PD
1
NC
GND
PD
0
NC
GND
4
PRELIMINARY
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................. –55°C to +125°C
Ambient Temperature
with Power Applied ......................................... –0°C to +70°C
3.3V Supply Voltage to Ground Potential....... –0.5V to +4.6V
5V Supply Voltage to Ground Potential.......... –0.5V to +7.0V
CYM74P430B/431B
CYM74P434B/435B
DC Voltage Applied to Outputs
in High Z State................................................–0.5V to +4.6V
DC Input Voltage ............................................–0.5V to +4.6V
Output Current into Outputs (LOW)............................. 20 mA
Operating Range
Range
Commercial
Ambient
Temperature
0° to 70°C
V
CC5
5V
±
5%
V
CC3
3.3V
+10%–5%
Electrical Characteristics
Over the Operating Range
Parameter
V
IH
V
IL
V
OH
V
OL
I
CC (74P430B)
I
CC (74P431B)
I
CC (74P434B)
I
CC (74P435B)
Description
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
Output LOW Voltage
V
CC
Operating Supply Current
V
CC
Operating Supply Current
V
CC
Operating Supply Current
V
CC
Operating Supply Current
V
CC
=Min. I
OH
= –4 mA
V
CC
=Min. I
OL
= 8 mA
V
CC
=Max., I
OUT
=0 mA, f=f
MAX
V
CC
=Max., I
OUT
=0 mA, f=f
MAX
V
CC
=Max., I
OUT
=0 mA, f=f
MAX
V
CC
=Max., I
OUT
=0 mA, f=f
MAX
Test Condition
Min.
2.0
–0.3
2.4
0.4
750
1400
900
1550
Max.
V
CC3
+ 0.3
0.8
Unit
V
V
V
V
mA
mA
mA
mA
Ordering Information
Speed
(MHz)
50
Ordering Code
CYM74P430BPM-50C
CYM74P431BPM-50C
CYM74P434BPM-50C
CYM74P435BPM-50C
60
CYM74P430BPM-60C
CYM74P431BPM-60C
CYM74P434BPM-60C
CYM74P435BPM-60C
66
CYM74P430BPM-66C
CYM74P431BPM-66C
CYM74P434BPM-66C
CYM74P435BPM-66C
Document #: 38-M-00079
Package
Name
PM38
PM40
PM39
PM41
PM38
PM40
PM39
PM41
PM38
PM40
PM39
PM41
160-Pin Dual-Readout SIMM
160-Pin Dual-Readout SIMM
Package Type
160-Pin Dual-Readout SIMM
Description
256 KB
512 KB
256 KB extended cache
512 KB extended cache
256 KB
512 KB
256 KB extended cache
512 KB extended cache
256 KB
512 KB
256 KB extended cache
512 KB extended cache
Commercial
Commercial
Operating
Range
Commercial
5
实时操作系统RTOS
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