72A
CYM9270
CYM9271B
CYM9272A
CYM9273
64K x 36 SRAM Module
128K x 36 SRAM Module
256K x 36 SRAM Module
512K x 36 SRAM Module
Features
•
Operates at 50 MHz
•
Uses 64K x 18 / 128K x 18 or 256K x 18 high-performance
synchronous SRAMs
•
144-Position Angled DIMM from Berg p/n 61178
•
3.3V inputs/data outputs
(9273) in plastic surface mount packages on an epoxy lami-
nate board with pins. The modules are designed to be incor-
porated into large memory arrays.
The modules are configured as single banks or multiple banks
depending on the SRAM used to make the module. Separate
clock are provided for each of the banks. Separate clocks are
provided for each of the SRAMs.
Multiple ground pins and on-board decoupling capacitors en-
sure high performance with maximum noise immunity.
All components on the cache modules are surface mounted on
a multi-layer epoxy laminate (FR-4) substrate. The contact
pins are plated with 150 micro-inches of nickel covered by 30
micro-inches of gold flash.
Functional Description
The CYM9270, CYM9271B, CYM9272A, and the CYM9273
are high-performance synchronous memory modules orga-
nized as 64K(9270), 128K(9271B), 256K(9272A), 512K(9273)
by 36 bits. These modules are constructed using either 128K
x 18 SRAMs (9270, 9271B, 9272A) or 256K x 18 SRAMs
Logic Block Diagram - CYM9270
A[15:0]
(2) 128K x 18 SRAMs
A
15:0
WE
OE
CS
BW[0:3]
ADSP
CLK[0:1]
OE
CS
SGW
OE
CS
BWE
WEH
WEL
ADSC
CLK
CLK[0:1]
D[0:15]
DQ[0:1]
D[0:31]
DQ[0:3]
Bank 0
PD
1
64Kx36
GND
PD
0
NC
Bank0
Cypress Semiconductor Corporation
Document #: 38-05135 Rev. **
•
3901 North First Street
•
San Jose
•
CA 95134 • 408-943-2600
Revised March 27, 2002
CYM9270
CYM9271B
CYM9272A
CYM9273
Logic Block Diagram - CYM9271B/CYM9272A
A[16:0]
(2) 128K x 18 SRAMs
A
16:0
WE
OE[0:1]
CS[0:1]
BW[0:3]
ADSP
CLK[0:3]
OE0
CS0
SGW
OE
CS
BWE
WEH
WEL
ADSC
CLK
D[0:15]
DQ[0:1]
D[0:31]
DQ[0:3]
Bank0
CLK[0:1]
(2) 128K x 18 SRAMs
A
16:0
SGW
OE1
CS1
OE
CS
BWE
WEH
WEL
ADSC
CLK
D[0:15]
DQ[0:1]
Bank1
PD
1
NC
GND
PD
0
GND
GND
CLK[2:3]
128Kx36
256KX36
Bank0
Bank0 and Bank1
Document #: 38-05135 Rev. **
Page 2 of 11
CYM9270
CYM9271B
CYM9272A
CYM9273
Logic Block Diagram - CYM9273
A[17:0]
(2) 256K x 18 SRAMs
A
17:0
WE
OE[0:1]
CS[0:1]
BW[0:3]
ADSP
CLK[0:3]
OE0
SGW
OE
D[0:15]
DQ[0:1]
CS[0] CS
BWE
WEH
WEL
ADSC
CLK
D[0:31]
DQ[0:3]
Bank0
CLK[0:1]
(2) 256K x 18 SRAMs
A
17:0
SGW
OE1
CS[1]
OE
CS
BWE
WEH
WEL
ADSC
CLK
D[0:15]
DQ[0:1]
Bank1
PD
1
512KX36
PD
0
CLK[2:3]
NC
NC
Bank0 and 1
Document #: 38-05135 Rev. **
Page 3 of 11
CYM9270
CYM9271B
CYM9272A
CYM9273
Pin Configuration
Dual Read-Out SIMM (DIMM)
Top View
GND
A
0
A
2
A
4
V
CC3
NC
NC
GND
A
6
A
8
A
10
NC
V
CC3
A
12
A
14
A
16
GND
PD
0
GND
BW[0]
CS[0]
GND
CLK1
GND
D
0
V
CC3
D
2
D
4
D
6
GND
V
CC3
D
8
D
10
GND
D
12
D
14
DQ
0
NC
NC
GND
WE
NC
V
CC3
NC
NC
NC
V
CC3
NC
NC
NC
GND
BW[2]
CS[1]
V
CC3
D
16
D
18
NC
NC
NC
GND
CLK3
GND
D
20
GND
D
22
D
24
D
26
D
28
V
CC3
D
30
DQ
2
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
GND
A
1
A
3
A
5
V
CC3
NC
NC
GND
A
7
A
9
A
11
NC
V
CC3
A
13
A
15
A
17
GND
PD
1
GND
BW[1]
OE[0]
GND
CLK0
GND
D
1
V
CC3
D
3
D
5
D
7
GND
V
CC3
D
9
D
11
GND
D
13
D
15
DQ
1
NC
NC
GND
ADSP
NC
V
CC3
NC
NC
NC
V
CC3
NC
NC
NC
GND
BW[3]
OE[1]
V
CC3
D
17
D
19
NC
NC
NC
GND
CLK2
GND
D
21
GND
D
23
D
25
D
27
D
29
V
CC3
D
31
DQ
3
GND
Document #: 38-05135 Rev. **
Page 4 of 11
CYM9270
CYM9271B
CYM9272A
CYM9273
Pin Definitions
Signal
V
CC3
GND
A[17:0]
ADSP
OE[1:0]
BW[0:3]
WE
CS[1:0]
PD
0
–PD
1
D[31:0]
DQ[3:0]
CLK[0:3]
NC
RSVD
3V Supply
Ground
Addresses from processor
Address strobe from the processor
Output Enables for each of the banks
Byte writes
Global Write
Chip Select for the two banks
Presence Detect output pins
Data lines from processor
Data Parity lines from processor
Clock lines to the module.
Signal not connected on module
Reserved
Description
Presence Detect Pins
PD
1
CYM9270 – 64K x 36
CYM9271B – 128K x 36
CYM9272A – 256K x 36
CYM9273 – 512K x 36
GND
NC
GND
NC
PD
0
NC
GND
GND
NC
Document #: 38-05135 Rev. **
Page 5 of 11
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