SM802111
ClockWorks™ GbE Dual 125MHz
Ultra-Low Jitter, LVPECL
Frequency Synthesizer
General Description
The SM802111 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for Gigabit Ethernet clock signals. It is
based upon a unique patented RotaryWave
®
architecture
that provides very-low phase noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes two LVPECL output clocks at 125MHz.
The SM802111 accepts a 15MHz LVCMOS reference
clock.
Data sheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Features
•
Generates two LVPECL clock outputs at 125MHz
•
2.5V or 3.3V operating range
•
Typical phase jitter @ 125MHz
(1.875MHz to 20MHz): 85fs (typical) at 3.3V
•
Industrial temperature range
•
Green, RoHS, and PFOS compliant
•
Available in 24-pin 4mm
×
4mm QFN
Applications
•
Gigabit Ethernet
___________________________________________________________________________________________________________
Block Diagram
ClockWorks is a trademark of Micrel, Inc.
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
April 2011
M9999-041111-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802111
Ordering Information
Part Number
SM802111UMG
SM802111UMGR
Marking
802111
802111
Shipping
Tube
Tape & Reel
Junction Temperature Range
–40° to +85°C
–40° to +85°C
Package
24-Pin QFN
24-Pin QFN
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
16, 17
20, 21
1, 18
2, 22
3, 4, 23, 24
Pin Name
/Q0, Q0
/Q1, Q1
VDDO
VSSO
NC
Pin Type
O, (DIF)
PWR
PWR
Pin Level
LVPECL
Pin Function
Differential Clock Output.
Power Supply for Clock Output.
Power Supply Grounds for Clock Output.
No Connect,. Do not connect anything to these pins.
PLL Bypass, Selects Output Source
5
PLL_BYPASS
I, (SE)
LVCMOS
0 = Normal PLL Operation
1 = Output from Input Reference Clock
45KΩ pull-down
7, 10, 11, 12,
15, 19
8
9
6, 13, 14
TEST
VDD
REF_IN
VSS
PWR
I, (SE)
PWR
LVCMOS
Factory Test Pins. Do not connect anything to these pins.
Core Power Supply.
Reference Clock Input.
Core Power Supply Ground.
April 2011
2
M9999-041111-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802111
Absolute Maximum Ratings
(1)
Supply Voltage (V
DD
, V
DDO
) .........................................+4.6V
Input Voltage (V
IN
) ..............................
−0.50V
to V
DD
+
0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (T
s
) .........................
−65°C
to
+150°C
Operating Ratings
(2)
Supply Voltage (V
DD
, V
DDO
) .................. +2.375V to +3.465V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
Junction Thermal Resistance
(3)
QFN (θ
JA
)
Still-Air.........................................................50°C/W
QFN (ψ
JB
)
Junction-to-Board........................................30°C/W
DC Electrical Characteristics
(4)
V
DD
= V
DDO
= 3.3V
±5%
or 2.5V
±5%
V
DD
= 3.3V
±5%,
V
DDO
= 3.3V
±5%
or 2.5V
±5%
T
A
= –40°C to +85°C
Symbol
V
DD
, V
DDO
V
DD
, V
DDO
I
DD
Parameter
2.5V Operating Voltage
3.3V Operating Voltage
Supply Current, V
DD
+
V
DDO
Outputs open
Condition
Min.
2.375
3.135
Typ.
2.5
3.3
91
Max.
2.625
3.465
115
Units
V
V
mA
LVPECL DC Electrical Characteristics
(4)
V
DD
= V
DDO
3.3V
±5%
or 2.5V
±5%
V
DD
= 3.3V
±5%,
V
DDO
= 3.3V
±5%
or 2.5V
±5%
T
A
= –40°C to +85°C; R
L
= 50Ω to V
DDO
−
2V
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage
Output Low Voltage
Output Voltage Swing
Condition
Min.
V
DDO
– 1.145
V
DDO
– 1.945
0.6
Typ.
V
DDO
– 0.97
V
DDO
– 1.77
0.8
Max.
V
DDO
– 0.845
V
DDO
– 1.645
1.0
Units
V
V
V
LVCMOS (PLL_BYPASS) DC Electrical Characteristics
(4)
V
DD
= 3.3V ±5% or 2.5V ±5%, T
A
= –40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
The circuit is designed to meet the AC and DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Condition
Min.
2
−0.3
Typ.
Max.
V
DD
+
0.3
0.8
150
Units
V
V
μA
μA
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
−5
2.
3.
4.
April 2011
3
M9999-041111-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802111
Ref_IN DC Electrical Characteristics
(4)
V
DD
= 3.3V ±5% or 2.5V ±5%, T
A
= –40°C to +85°C.
Symbol
V
IH
V
IL
I
IN
Parameter
Input High Voltage
Input Low Voltage
Input Current
V
DD
= 3.465V, V
IN
= 0V to V
DD
Condition
Min.
1.1
−0.3
−5
Typ.
Max.
V
DD
+
0.3
0.6
5
Units
V
V
μA
AC Electrical Characteristics
(4, 5)
V
DD
= V
DDO
= 3.3V
±5%
or 2.5V
±5%
V
DD
= 3.3V
±5%,
V
DDO
= 3.3V
±5%
or 2.5V
±5%
T
A
=
−40°C
to
+85°C;
R
L
= 50Ω to V
DDO
−
2V
Symbol
F
OUT
F
REF
T
R
/T
F
ODC
T
SKEW
T
LOCK
T
jit
(∅)
Parameter
Output Frequency
Reference Input Frequency
LVPECL Output Rise/Fall Time
Output Duty Cycle
Output-to-Output Skew
PLL Lock Time
RMS Phase Jitter
(7)
Condition
Min.
Typ.
125
15
Max.
Units
MHz
MHz
20% – 80%
Note 6
Output = 125MHz Integration
Range (1.875MHz – 20MHz)
5MHz
80
48
175
50
350
52
45
20
ps
%
ps
ms
fs
dBc
85
-73
Spurious Noise Components
Notes:
5.
6.
7.
All phase-noise measurements were taken with an Agilent 5052B phase-noise system.
Defined as skew between outputs at the same supply voltage and with equal load conditions; Measured at the output differential crossing points.
Ref_IN driven with a low-noise source ClockWorks SM802001 programmed for a 15MHz CMOS output. Phase noise will track the input phase
noise up to about 1MHz offset frequency.
April 2011
4
M9999-041111-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802111
SM802111 Phase Noise Plot
Phase Noise Plot: 125MHz (1.875MHz
−
20MHz 75fs)
April 2011
5
M9999-041111-A
hbwhelp@micrel.com
or (408) 955-1690
FPGA/CPLD
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