SY54020R
Low Voltage 1.2V/1.8V/2.5V CML 1:4 Fanout
Buffer with /EN and Fail-Safe Input
3.2Gbps, 2.5GHz
General Description
The SY54020R is a fully differential, low voltage
1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with active-low
Enable (/EN) and Fail-Safe Input (FSI). The Enable is
synchronous so that the outputs will only be
enabled/disabled when they are already in the LOW
state. This avoids any chance of generating a runt clock
pulse when the device is enabled/disabled as can
happen with an asynchronous control. When this device
is used as a clock fanout, disabling the downstream
clock may reduce system power. FSI is a special circuit
designed to sense the amplitude of the input signal and
to latch the output when an invalid or no signal is
present at the input. The SY54020R can process clock
signals up to 2.5 GHz or data patterns up to 3.2Gbps.
The differential input includes Micrel’s unique, 3-pin
input termination architecture that interfaces to LVPECL,
LVDS or CML differential signals as small as 100mV
(200mV
pp
) without any level-shifting or termination
resistor networks in the signal path. For AC-coupled
input interface applications, an internal voltage
reference is provided to bias the V
T
pin. The outputs are
CML, with extremely fast rise/fall times guaranteed to be
less than 100ps.
The SY54020R operates from a 2.5V ±5% core supply
and a 1.2V, 1.8V or 2.5V ±5% output supply and is
guaranteed over the full industrial temperature range
(–40°C to +85°C).
Datasheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Precision Edge
®
Features
•
1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with FSI
•
Active-low Enable (/EN) input to disable the outputs
•
Guaranteed AC performance over temperature and
voltage:
– DC-to > 3.2Gbps Data throughput
– DC-to > 2.5GHz Clock throughput
– <400 ps propagation delay (IN-to-Q)
– <20ps within-device skew
– <100 ps rise/fall times
•
Ultra-low jitter design
– <1ps
RMS
cycle-to-cycle jitter
•
High-speed CML outputs
•
2.5V ±5% V
CC
, 1.2/1.8V/2.5V ±5% V
CCO
power supply
operation
•
Industrial temperature range: –40°C to +85°C
•
Available in 16-pin (3mm x 3mm) MLF
®
package
Applications
•
SONET clock and data distribution
•
Fibre Channel clock and data distribution
•
Gigabit Ethernet clock and data distribution
Markets
•
•
•
•
•
•
•
Storage
ATE
Test and measurement
Enterprise networking equipment
High-end servers
Access
Metro area network equipment
Functional Block Diagram
Precision Edge is a registered trademark of Micrel, Inc.
MLF and
MicroLeadFrame
are registered trademarks of Amkor Technology.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2009
M9999-041409-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY54020R
Ordering Information
(1)
Part Number
SY54020RMG
SY54020RMGTR
(2)
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
Package
Type
MLF-16
MLF-16
Operating
Range
Industrial
Industrial
Package Marking
020R with Pb-Free
bar-line indicator
020R with Pb-Free
bar-line indicator
Lead
Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
16-Pin MLF
®
(MLF-16)
April 2009
2
M9999-041409-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY54020R
Pin Description
Pin Number
2,3
Pin Name
IN, /IN
Pin Function
Differential Input: This input pair is the differential signal input to the device. It
accepts differential signals as small as 100mV (200mV
PP
). Each input pin internally
terminates with 50Ω to the VT pin. If the input swing falls below a certain threshold
(typical 30mV), the Fail-Safe Input (FSI) feature will guarantee a stable output by
latching the output to its last valid state. Please refer to the “Interface Applications”
section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to
VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC coupling, bypass VT with 0.1µF low ESR capacitor to
VCC. See “Interface Applications” subsection and Figure 2a.
Single-ended TTL/CMOS-compatible input functions as a synchronous output
enable. The synchronous enable ensures that enable/disable will only occur when
the outputs are in a logic LOW state. The input -switching threshold is Vcc/2. Note
that this input is internally connected to a 25kΩ pull-down resistor and will default to
a logic LOW state (Enabled) if left open. Outputs are disabled when /EN is high.
See Figure 1b for more details.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to
the V
CC
pin as possible. Supplies input and core circuitry.
Output Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the V
CCO
pin as possible. Supplies the output buffers.
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pin.
CML Differential Output Pairs: Differential buffered copy of the input signal. The
output swing is typically 380mV. See “Interface Applications” subsection for
termination information.
1
VT
4
/EN
16
8,13
5
15,14
12,11
10,9
7,6
VCC
VCCO
GND,
Exposed pad
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Truth Table
IN
0
1
X
Note:
1. See timing diagram, Figure 1b.
/IN
1
0
X
/EN
0
0
1
Q
0
1
0
(1)
/Q
1
0
1
(1)
April 2009
3
M9999-041409-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY54020R
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) ............................... –0.5V to +3.0V
Supply Voltage (V
CCO
) ............................. –0.5V to +2.7V
V
CC
- V
CCO
...............................................................<1.8V
V
CCO
- V
CC
...............................................................<0.5V
Input Voltage (V
IN
) ............................–0.5V to V
CC
+ 0.5V
CML Output Voltage (V
OUT
) ............... 0.6V to V
CCO
+0.5V
Current (V
T
)
Source or sink current on VT pin .................±100mA
Input Current
Source or sink current on (IN, /IN).................±50mA
Maximum operating Junction Temperature .......... 125°C
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (T
s
) ....................–65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
CC
)..........................2.375V to 2.625V
(V
CCO
)………………….1.14V to 2.625V
Ambient Temperature (T
A
) ................... –40°C to +85°C
Package Thermal Resistance
(3)
MLF
®
Still-air (θ
JA
) ............................................ 75°C/W
Junction-to-board (ψ
JB
) ......................... 33°C/W
DC Electrical Characteristics
(4)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
Parameter
Power Supply Voltage Range
Condition
V
CC
V
CCO
V
CCO
V
CCO
Max. V
CC
No Load. V
CCO
45
90
IN, /IN
Min. V
IL
with V
IH
= 1.2V
IN, /IN
V
IL
with V
IH
= 1.14V, (1.2V-5%)
see Figure 3a
see Figure 3b
1.2
0.2
1.14
0.66
0.1
0.2
Min
2.375
1.14
1.7
2.375
Typ
2.5
1.2
1.8
2.5
42
64
50
100
Max
2.625
1.26
1.9
2.625
58
84
55
110
V
CC
V
IH
–0.1
V
CC
V
IH
–0.1
1.0
2.0
1.28
Units
V
V
V
V
mA
mA
Ω
Ω
V
V
V
V
V
V
V
I
CC
I
CCO
R
IN
R
DIFF_IN
V
IH
V
IL
V
IH
V
IL
V
IN
V
DIFF_IN
V
T_IN
Notes:
Power Supply Current
Power Supply Current
Input Resistance
(IN-to-V
T
, /IN-to-V
T
)
Differential Input Resistance
(IN-to-/IN)
Input HIGH Voltage
(IN, /IN)
Input LOW Voltage
(IN, /IN)
Input HIGH Voltage
(IN, /IN)
Input LOW Voltage
(IN, /IN)
Input Voltage Swing
(IN, /IN)
Differential Input Voltage Swing
(|IN - /IN|)
Voltage from Input to V
T
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this datasheet. Exposure to absolute maximum ratings conditions
for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB.
ψ
JB
and
θ
JA
values are determined for a 4-layer board in still-air number, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
April 2009
4
M9999-041409-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY54020R
CML Outputs DC Electrical Characteristics
(5)
V
CCO
= 1.14V to 1.26V, R
L
= 50Ω to V
CCO,
V
CCO
= 1.7V to 1.9V; 2.375V to 2.625V, R
L
= 50Ω to V
CCO
or 100Ω across the outputs,
V
CC
= 2.375V to 2.625V. T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
OH
V
OUT
V
DIFF_OUT
R
OUT
Parameter
Output HIGH Voltage
Output Voltage Swing
Differential Output Voltage Swing
Output Source Impedance
Condition
R
L
= 50Ω to V
CCO
See Figure 3a
See Figure 3b
Min
V
CCO
-0.020
300
600
45
Typ
V
CCO
-0.010
390
780
50
Max
V
CCO
475
950
55
Units
V
mV
mV
Ω
LVTTL/CMOS DC Electrical Characteristics
(5)
V
CC
= 2.5V ±5%, T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
IH
V
IL
I
IH
I
IL
Note:
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min
2.0
Typ
Max
V
CC
0.8
200
Units
V
V
µA
µA
V
IH
= V
CC
V
IL
= 0V
-5
75
April 2009
5
M9999-041409-A
hbwhelp@micrel.com
or (408) 955-1690
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