HY6264A Series
8Kx8bit CMOS SRAM
DESCRIPTION
The HY6264A is a high-speed, low power and
8,192x8-bits CMOS static RAM fabricated using
Hyundai's high performance twin tub CMOS
process technology. This high reliability process
coupled with innovative circuit design techniques,
yields maximum access time of 70ns. The
HY6264A has a data retention mode that
guarantees data to remain valid at the minimum
power supply voltage of 2.0 volt. Using the CMOS
technology, supply voltage from 2.0 to 5.5 volt
has little effect on supply current in the data
retention mode. Reducing the supply voltage to
minimize current drain is unnecessary for the
HY6264A Series.
FEATURES
•
•
•
•
Fully static operation and Tri-state outputs
TTL compatible inputs and outputs
Low power consumption
Battery backup(L/LL-part)
-2.0V(min.) data retention
•
Standard pin configuration
-28 pin 600 mil PDIP
-28 pin 330 mil SOP
Product
Voltage
Speed
No.
(V)
(ns)
HY6264A
5.0
70/85/100
Note 1. Current value is max.
Operation
Current(mA)
50
Standby Current(uA)
L
LL
1mA
100
10
Temperature
(°C)
0~70(Normal)
PIN CONNECTION
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
/WE
CS2
A8
A9
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
BLOCK DIAGRAM
A0
SENSE AMP
ROW DECODER
ADD INPUT BUFFER
I/O1
OUTPUT BUFFER
I/O8
CS2
PDIP
SOP
/OE
/WE
PIN DESCRIPTION
Pin Name
/CS1
CS2
/WE
/OE
A0-A12
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Address Inputs
Pin Name
I/O1-I/O8
Vcc
Vss
NC
Pin Function
Data Input/Output
Power(+5V)
Ground
No Connect
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.02 /Jan.99
Hyundai Semiconductor
CONTROL
LOGIC
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
/WE
CS2
A8
A9
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
COLUMN DECODER
A12
/CS1
WRITE DRIVER
MEMORY ARRAY
128x512
HY6264A Series
ORDERING INFORMATION
PART NO.
HY6264AP
HY6264ALP
HY6264ALLP
HY6264AJ
HY6264ALJ
HY6264ALLJ
SPEED
70/85/100
70/85/100
70/85/100
70/85/100
70/85/100
70/85/100
POWER
L-part
LL-part
L-part
LL-part
PACKAGE
PDIP
PDIP
PDIP
SOP
SOP
SOP
ABSOLUTE MAXIMUM RATING
(1)
Symbol
Vcc, V
IN,
V
OUT
T
A
T
STG
P
D
I
OUT
T
SOLDER
Parameter
Power Supply, Input/Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation
Data Output Current
Lead Soldering Temperature & Time
Rating
-0.5 to 7.0
0 to 70
-65 to 125
1.0
50
260
•10
Unit
V
°C
°C
W
mA
°C•sec
Note
1.
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these
or any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for an extended period may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
T
A
=0°C TO 70°C
Symbol
Parameter
Vcc
Supply Voltage
V
IH
Input High Voltage
V
IL
Input Low Voltage
Min.
4.5
2.2
-0.5(1)
Typ.
5.0
-
-
Max.
5.5
Vcc+0.5
0.8
Unit
V
V
V
Note
1.V
IL
= -3.0V for pulse width less than 50ns
TRUTH TABLE
/CS1
H
X
L
L
L
CS2
X
L
H
H
H
/WE
X
X
H
H
L
/OE
X
X
H
L
X
MODE
Standby
Output Disabled
Read
Write
I/O OPERATION
High-Z
High-Z
High-Z
Data Out
Data In
Note
1. H=V
IH
, L=V
IL
, X=Don't Care
Rev.02 /Jan.99
2
HY6264A Series
DC ELECTRICAL CHARACTERISTICS
Vcc = 5.0V±10%, T
A
= 0°C to 70°C (Normal) unless otherwise specified
Symbol
Parameter
Test Condition
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
I
LO
Output Leakage Current Vss < V
OUT
< Vcc /CS1=V
IH
or
CS2=V
IL
or /OE
=
V
IH
or/ WE = V
IL
Icc
Operating Power Supply /CS1 = V
IL
, CS2=V
IH,
Current
V
IN
= V
IH
or V
IL,
I
I/O
= 0mA
I
CC1
Average Operating
/CS1 = V
IL,
CS2=V
IH
Min
.
Duty
Current
Cycle = 100%, I
I/O =
0mA
I
SB
TTL Standby Current
/CS1 = V
IH
or CS2=V
IL
(TTL Input)
I
SB1
CMOS Standby Current /CS1 > Vcc - 0.2V,
(CMOS Input)
CS2 < 0.2V,or
L
CS2 >Vcc-0.2V
LL
V
OL
Output Low Voltage
I
OL
= 2.1mA
V
OH
Output High Voltage
I
OH =
-1.0mA
Note : Typical values are at Vcc = 5.0V, T
A
= 25°C
Min
-1
-1
-
-
-
-
-
-
-
2.4
Typ
-
-
30
30
0.4
-
2
1
-
-
Max
1
1
50
50
2
1
100
10
0.4
-
Unit
uA
uA
mA
mA
mA
mA
uA
uA
V
V
AC CHARACTERISTICS
Vcc = 5.0V±10%, T
A
= 0°C to 70°C (Normal), unless otherwise noted
-70
-85
#
Parameter
Symbol
Min Max Min Max
READ CYCLE
1
tRC
Read Cycle Time
70
-
85
-
2
tAA
Address Access Time
-
70
-
85
3
tACS
Chip Select Access Time
-
70
-
85
4
tOE
Output Enable to Output Valid
-
45
-
50
5
tCLZ
Chip Select to Output in Low Z
10
-
10
-
6
tOLZ
Output Enable to Outputin Low Z
5
-
5
-
7
tCHZ
Chip Deselection to Output in High Z
0
30
0
35
8
tOHZ
Out Disable to Output in High Z
0
30
0
35
9
tOH
Output Hold from Address Change
5
-
5
-
WRITE CYCLE
10 tWC
Write Cycle Time
70
-
85
-
11 tCW
Chip Selection to End of Write
55
-
60
-
12 tAW
Address Valid to End of Write
55
-
60
-
13 tAS
Address Set-up Time
0
-
0
-
14 tWP
Write Pulse Width
50
-
55
-
15 tWR
Write Recovery Time
0
-
0
-
16 tWHZ
Write to Output in High Z
0
30
0
35
17 tDW
Data to Write Time Overlap
35
-
35
-
18 tDH
Data Hold from Write Time
0
-
0
-
19 tOW
Output Active from End of Write
5
-
5
-
-10
Min Max
100
-
-
-
10
5
0
0
10
100
70
70
0
60
0
0
40
0
5
-
100
100
55
-
-
35
35
-
-
-
-
-
-
-
35
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev.02 /Jan.99
3
HY6264A Series
AC TEST CONDITIONS
T
A
= 0°C to 70°C (Normal), unless otherwise specified.
PARAMETER
Value
Input Pulse Level
0.8V to 2.4V
Input Rise and Fall Time
5ns
Input and Output Timing Reference Level
1.5V
Output Load
CL = 100pF + 1TTL Load
AC TEST LOADS
TTL
CL(1)
Note : Including jig and scope capacitance
CAPACITANCE
Temp = 25°C, f= 1.0MHz
Symbol
C
IN
C
I/O
Parameter
Input Capacitance
Input/Output Capacitance
Condition
V
IN
= 0V
V
I/O
= 0V
Max.
6
8
Unit
pF
pF
Note : These parameter are sampled and not 100% tested
TIMING DIAGRAM
READ CYCLE 1(Note 1)
tRC
ADDR
tAA
OE
tOE
tOLZ
CS1
tOH
CS2
tACS
tCLZ
Data
Out
High-Z
Data Valid
tOHZ
tCHZ
Rev.02 /Jan.99
4
HY6264A Series
Note(READ CYCLE):
1.t
CHZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions
and are not referenced to output voltage levels.
2.At any given temperature and voltage condition, t
CHZ
max. is less than t
CLZ
min. both for a given
device and from device to device.
3./WE is high for the read cycle.
READ CYCLE 2(Note 1,2,3)
tRC
ADDR
tAA
tOH
Data
Out
Previous Data
Data Valid
tOH
Note(Read Cycle)
1./WE is high for the read cycle.
2.Device is continuously selected /CS=V
IL
, CS2=V
IH
.
3./OE=V
IL
.
WRITE CYCLE 1(/WE Controlled)
tWC
ADDR
tAW
tCW
CS1
tWR(2)
CS2
tAS
WE
tWP
tDW
Data In
tOHZ
Data
Out
Data Undefined
tDH
Data Valid
tOW
High-Z
Rev.02 /Jan.99
5
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