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MB90367SPMT

产品描述Microcontroller, 16-Bit, MROM, 24MHz, CMOS, PQFP48, PLASTIC, LQFP-48
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小623KB,共59页
制造商Cypress(赛普拉斯)
下载文档 详细参数 全文预览

MB90367SPMT概述

Microcontroller, 16-Bit, MROM, 24MHz, CMOS, PQFP48, PLASTIC, LQFP-48

MB90367SPMT规格参数

参数名称属性值
厂商名称Cypress(赛普拉斯)
包装说明PLASTIC, LQFP-48
Reach Compliance Codecompliant
具有ADCYES
地址总线宽度
位大小16
最大时钟频率24 MHz
DAC 通道NO
DMA 通道NO
外部数据总线宽度
JESD-30 代码S-PQFP-G48
长度7 mm
I/O 线路数量36
端子数量48
最高工作温度105 °C
最低工作温度-40 °C
PWM 通道NO
封装主体材料PLASTIC/EPOXY
封装代码LFQFP
封装形状SQUARE
封装形式FLATPACK, LOW PROFILE, FINE PITCH
认证状态Not Qualified
ROM可编程性MROM
座面最大高度1.7 mm
速度24 MHz
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.5 mm
端子位置QUAD
宽度7 mm
uPs/uCs/外围集成电路类型MICROCONTROLLER

MB90367SPMT文档预览

FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13736-1E
16-bit Proprietary Microcontroller
CMOS
F
2
MC-16LX MB90360 Series
MB90F362/T/S/TS, MB90362/T/S/TS, MB90F367/T/S/TS,
MB90367/T/S/TS, MB90V340A-101, MB90V340A-102,
MB90V340A-103, MB90V340A-104
DESCRIPTION
The MB90360-series with 1 channel FULL-CAN* interface and FLASH ROM is especially designed for automotive
and other industrial applications. Its main feature is the on-board CAN Interfaces, which conform to Ver 2.0 Part
A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a
normal full CAN approach. With the new 0.35
µm
CMOS technology, Fujitsu now offers on-chip FLASH-ROM
program memory up to 64 Kbytes.
The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a
major advantage in terms of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction execution time from an external
4 MHz clock. Also, main and sub-clock can be monitored independently using the clock monitor function.
The unit features a 4 channel input capture unit 1 channel 16-bit free running timer, 2-channel LIN-UART, and
16-channel 8/10-bit A/D converter as the peripheral resource.
* : Controller Area Network (CAN) - License of Robert Bosch GmbH
Note : F
2
MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.
PACKAGE
48-pin Plastic LQFP
(FPT-48P-M26)
MB90360 Series
FEATURES
Clock
• Built-in PLL clock frequency multiplication circuit
• Selection of machine clocks (PLL clocks) is allowed among frequency division by 2 on oscillation clock and
multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz) .
• Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed (devices without S-
suffix only) .
• Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock and 6-time multiplied
PLL clock) .
Clock monitor function (MB90x367x only)
• Main clock or sub-clock is monitored independently
• Internal CR oscillation clock (100 kHz typical) can be used as sub-clock
Instruction system best suited to controller
• 16 Mbytes CPU memory space
• 24-bit internal addressing
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes (23 types)
• Enhanced multiply-divide instructions with sign and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
Increased processing speed
• 4-byte instruction queue
Powerful interrupt function
• Powerful 8-level, 34-condition interrupt feature
• Up to 8 channel external interrupts are supported
Automatic data transfer function independent of CPU
• Expanded intelligent I/O service function (EI
2
OS) : up to 16 channels
Low-power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Main timer mode (timebase timer mode that is transferred from main clock mode)
• PLL timer mode (timebase timer mode that is transferred from PLL clock mode)
• Watch mode (a mode that operates sub-clock and watch timer only, devices without S-suffix)
• Stop mode (a mode that stops oscillation clock and sub-clock)
• CPU blocking operation mode
Process
• CMOS technology
I/O port
• General-purpose input/output port (CMOS output)
- 34 ports (devices without S-suffix)
- 36 ports (devices with S-suffix)
Sub-clock pin (X0A and X1A)
• Provided (used for external oscillation), devices without S-suffix
• Not provided (used with internal CR oscillation in sub-clock mode) , devices with S-suffix
(Continued)
2
MB90360 Series
(Continued)
Timer
• Timebase timer, watch timer (device without S-suffix) , watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit
×
2 channels or 16-bit
×
2 channels
• 16-bit reload timer : 2 channels
• 16- bit input/output timer
- 16-bit free run timer : 1 channel (FRT0 : ICU 0/1/2/3)
- 16- bit input capture : (ICU) : 4 channels
Full-CAN interface : up to 1 channel
• Compliant with Ver 2.0A and Ver 2.0B CAN specifications
• Flexible message buffering (mailbox and FIFO buffering can be mixed)
• CAN wake-up function
UART (LIN/SCI) : up to 2 channels
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
DTP/External interrupt : up to 8 channels, CAN wakeup : up to 1 channel
• Module for activation of expanded intelligent I/O service (EI
2
OS) and generation of external interrupt by external
input.
Delay interrupt generator module
• Generates interrupt request for task switching.
8/10-bit A/D converter : 16 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3
µs
(at 24-MHz machine clock, including sampling time)
Program patch function
• Address matching detection for 6 address pointers.
Low voltage/CPU operation detection reset (devices with T-suffix)
• Detects low voltage (4.0 V
±
0.3 V) and resets automatically
• Resets automatically when program is runaway and counter is not cleared within interval time
(approx. 262 ms : external 4 MHz)
Capable of changing input voltage for port
• Automotive/CMOS-Schmitt (initial level is Automotive in single-chip mode)
FLASH memory security function
• Protects the content of FLASH memory (FLASH memory device only)
3
MB90360 Series
PRODUCT LINEUP
Features
CPU
System clock
Sub-clock pin
(X0A, X1A)
Clock monitor
function
ROM
RAM capacitance
CAN
interface
Low voltage/CPU
operation
detection reset
Package
Emulator-specific
power supply *
Corresponding
EVA product
MB90V340A-102
No
Yes
LQFP-48P
MB90V340A-101
MASK ROM, 64 Kbytes
3 Kbytes
1 channel
MB90362
MB90362T
MB90362S
MB90362TS
MB90V340
A-101
MB90V340
A-102
F
2
MC-16LX CPU
PLL clock multiplier (
×
1,
×
2,
×
3,
×
4,
×
6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz oscillation clock, PLL
×
6)
Yes
No
No
External
30 Kbytes
3 channels
No
Yes
No
Yes
No
PGA-299C
Yes
* : It is setting of Jumper switch (TOOL V
CC
) when emulator (MB2147-01) is used. Please refer to the Emulator
hardware manual for the details.
Features
CPU
MB90F362
MB90F362T
MB90F362S
MB90F362TS
F
2
MC-16LX CPU
PLL clock multiplier
(
×
1,
×
2,
×
3,
×
4,
×
6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns
(4 MHz oscillation clock, PLL
×
6)
Yes
No
Flash memory, 64 Kbytes
3 Kbytes
1 channel
No
System clock
Sub-clock pin
(X0A, X1A)
Clock monitor
function
ROM
RAM capacitance
CAN
interface
Low voltage/CPU
operation detec-
tion reset
Package
Corresponding
EVA product
4
No
Yes
LQFP-48P
No
Yes
MB90V340A-102
MB90V340A-101
MB90360 Series
Features
CPU
System clock
Sub-clock pin
(X0A, X1A)
Clock monitor
function
ROM
RAM capacitance
CAN
interface
Low voltage/CPU
operation
detection reset
Package
Emulator-specific
power supply *
Corresponding
EVA product
MB90367
MB90367T
MB90367S
MB90367TS
MB90V340
A-103
MB90V340
A-104
F
2
MC-16LX CPU
PLL clock multiplier (
×
1,
×
2,
×
3,
×
4,
×
6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz oscillation clock, PLL
×
6)
Yes
No
(internal CR oscillation can be used as sub-clock)
Yes
MASK ROM, 64 Kbytes
3 Kbytes
1 channel
No
Yes
No
LQFP-48P
MB90V340A-104
MB90V340A-103
Yes
External
30 Kbytes
3 channels
No
PGA-299C
Yes
Yes
* : It is setting of Jumper switch (TOOL V
CC
) when emulator (MB2147-01) is used. Please refer to the Emulator
hardware manual for the details.
Features
CPU
System clock
MB90F367
MB90F367T
MB90F367S
MB90F367TS
F
2
MC-16LX CPU
PLL clock multiplier
(
×
1,
×
2,
×
3,
×
4,
×
6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns
(4 MHz oscillation clock, PLL
×
6)
Yes
No
(internal CR oscillation can be
used as sub-clock)
Yes
Flash memory, 64 Kbytes
3 Kbytes
1 channel
Sub-clock pin
(X0A, X1A)
Clock monitor
function
ROM
RAM capacitance
CAN
interface
Low voltage/CPU
operation
detection reset
Package
Corresponding
EVA product
No
Yes
LQFP-48P
No
Yes
MB90V340A-104
MB90V340A-103
5
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