SY89852U
Precision Low Power Differential 2:1
LVPECL MUX with Internal Termination
General Description
The SY89852U is a 2.5V/3.3V precision, high-
speed, 2:1 differential MUX capable of handling
clocks up to 2.5GHz and data streams up to
2.5Gbps.
The differential input includes Micrel’s unique, patent
pending 3-pin input termination architecture that
allows users to interface to any differential signal
(AC- or DC-coupled) as small as 100mV (200mV
pp
)
without any level shifting or termination resistor
networks in the signal path. The unique, patent input
isolation design minimizes crosstalk minimizing
crosstalk induced jitter. The outputs are 800mV
LVPECL, with extremely fast rise/fall time
guaranteed to be less than 180ps.
The SY89852U operates from a 2.5V ±5% supply or
a 3.3V ±10% supply and is guaranteed over the full
industrial temperature range of –40°C to +85°C.
The SY89852U is part of Micrel’s high-speed,
®
product line. All support
Precision Edge
documentation can be found on Micrel’s web site at:
www.micrel.com.
Precision Edge
®
Features
•
•
•
•
Provides a low jitter copy of the selected input
Superior alternative to the EP58 2:1 MUX
Low power: 58mW (2.5V nominal, no load)
Guaranteed AC performance over temperature
and supply voltage:
– DC- to > 2.5Gbps data rate throughput
– DC- to > 2.5GHz clock f
MAX
– < 340ps In-to-Out t
pd
– < 180ps t
r
/t
f
time
Ultra-low Jitter Design:
– <1ps
(rms)
random jitter
– <10ps
(pp)
deterministic jitter
– <10ps
(pp)
total jitter (clock)
– <0.7ps
(rms)
crosstalk induced jitter
Unique, patent-pending input isolation design
minimizes crosstalk
Unique, patent pending input termination and VT
pin accepts DC-coupled and AC-coupled inputs
(CML, PECL, LVDS)
Typical 800mV (100k) LVPECL output swing
Power supply 2.5V +5% or 3.3V +10%
o
o
Industrial temperature range –40 C to +85 C
Available in ultra-small (3mm x 3mm) 16-pin QFN
package
•
•
•
•
•
•
•
Typical Applications
Applications
•
•
•
•
Redundant clock distribution
SONET/SDH clock/data distribution
Loopback
Fibre Channel distribution
Markets
•
•
•
•
Precision Edge is a registered trademark of Micrel, Inc.
LAN/WAN
Enterprise servers
ATE
Test and measurement
October 2008
M9999-100208-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89852U
Ordering Information
(1)
Part Number
SY89852UMG
SY89852UMGTR
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electrical Only.
2. Tape and Reel.
(2)
Package
Type
QFN-16
QFN-16
Operating
Range
Industrial
Industrial
Package Marking
852U with bar-line designator
852U with bar-line designator
Lead
Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
16-Pin QFN
October 2008
2
M9999-100208-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89852U
Pin Description
Pin Number
1,2,
3,4
Pin Name
Pin Function
Differential Input: This input pair is the signal to be buffered. These inputs accept
AC- or DC-coupled signals as small as 100mV (200mV
PP
). Each pin of this pair
internally terminates to a VT pin through 50Ω. Note that this input will default to
an indeterminate state if left open. Please refer to the “Input Interface
Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates
to this pin. The VT pin provides a center-tap to a termination network for
maximum interface flexibility. See “Input Interface Applications” section for more
details.
Positive Power Supply. Bypass with 0.1µF0.01µF low ESR capacitors as close
to the V
CC
pin as possible.
Differential 100K LVPECL Output: This LVPECL output is the output of the
device. Terminate through 50Ω to V
CC
–2V. PECL output requires DC path to
ground. Thus, AC-coupled applications require pull-down resistors. See “Output
Interface Applications” section.
Ground. Ground pin and exposed pad must be connected to the same ground
plane.
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25KΩ pull-up resistor
and will default to logic HIGH state if left open.
No connect.
IN, /IN
16,5
VT
8,13
VCC
12,9
Q, /Q
GND,
Exposed Pad
SEL
NC
10,11,14,15
6
7
Truth Table
IN0
0
1
X
X
Note:
1. SEL is connected to a 25kΩ
pull-up
resistor and will default to logic high if left open.
IN1
X
X
0
1
SEL
0
0
1
1
(1)
Q
0
1
0
1
Functional Block Diagram
October 2008
3
M9999-100208-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89852U
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) .......................... –0.5V to +4.0V
Input Voltage (V
IN
) ..................................–0.5V to V
CC
LVPECL Output Current (I
OUT
)
Continuous ................................................. 50mA
Surge ........................................................ 100mA
(3)
Termination Current
Source or sink current on V
T
.................... ±50mA
Lead Temperature (soldering, 20sec.) ........... +260°C
Storage Temperature (T
s
) ..................–65°C to 150°C
Operating Ratings
(2)
Supply Voltage (V
CC
).................. +2.375V to +2.625V
......................................................+3.0V to +3.6V
Ambient Temperature (T
A
) ................ –40°C to +85°C
(4)
Package Thermal Resistance
QFN (θ
JA
)
Still-Air ..................................................... 60°C/W
QFN (ψ
JB
)
Junction-to-Board .................................... 38°C/W
DC Electrical Characteristics
(5)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
DIFF_IN
R
IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
T_IN
Notes:
1. Permanent device damage may occur if the “Absolute Maximum Ratings” are exceeded. This is a stress rating only and functional
operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute
maximum ratings conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability, use for input of the same package only.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
θ
JA
and
ψ
JB
use a 4-layer board in still air, unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IH
(min) not lower than 1.2V.
Parameter
Power Supply
Power Supply Current
Differential Input Resistance
(IN-to-/IN)
Input Resistance
(IN-to-V
T
)
Input High Voltage
(IN-to-/IN)
Input Low Voltage
(IN-to-/IN)
Input Voltage Swing
(IN-to-/IN)
Differential Input Voltage Swing
|IN-/IN|
IN-to-V
T
(IN-to-/IN)
Condition
Min
2.375
3.0
Typ
2.5
3.3
23
Max
2.625
3.6
35
120
60
V
CC
V
IH
–0.1
1.7
Units
V
V
mA
Ω
Ω
V
V
V
V
No load, max. V
CC
80
40
Note 6
V
CC
–1.6
0
See Figure 1a.
See Figure 1b.
0.1
0.2
100
50
1.28
V
October 2008
4
M9999-100208-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89852U
LVPECL Outputs DC Electrical Characteristics
(7)
V
CC
= 2.5V ±5% or 3.3V ±10%; T
A
= –40°C to + 85°C; R
L
= 50Ω
to V
CC
–2V, unless otherwise stated.
Symbol
V
OH
V
OL
V
OUT
V
DIFF-OUT
Parameter
Output HIGH Voltage
Q, /Q
Output LOW Voltage
Q, /Q
Output Voltage Swing
Q, /Q
Differential Output Voltage Swing
Q, /Q
See Figure 1a.
See Figure 1b.
Condition
Min
V
CC
–1.145
V
CC
–1.945
550
1100
800
1600
Typ
Max
V
CC
–0.895
V
CC
–1.695
Units
V
V
mV
mV
LVTTL/CMOS DC Electrical Characteristics
(7)
Symbol
V
IH
V
IL
I
IH
I
IL
Note:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min
2.0
-125
-300
Typ
Max
V
CC
0.8
30
Units
V
V
µA
µA
October 2008
5
M9999-100208-D
hbwhelp@micrel.com
or (408) 955-1690
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