SY89838U
Precision 1:8 LVDS Clock Fanout Buffer
with 2:1 Runt Pulse Eliminator Input MUX
General Description
The SY89838U is a low jitter, low skew, high-speed
1:8 fanout buffer with a unique, 2:1 differential input
multiplexer (MUX) optimized for redundant source
switchover applications. Unlike standard multiplexers,
the SY89838U unique 2:1 Runt Pulse Eliminator
(RPE) MUX prevents any short cycles or “runt” pulses
during switchover. In addition, a unique fail-safe input
protection prevents metastable conditions when the
selected input clock fails to a DC voltage (voltage
between the pins of the differential input drops below
200mV). The SY89838U distributes clock frequencies
from 1kHz to 1.5GHz, guaranteed, over temperature
and voltage.
The differential input includes Micrel’s unique, 3-pin
input termination architecture that allows customers to
interface to any differential signal (AC- or DC-coupled)
as small as 200mV (400Mv
PP
) without any level
shifting or termination resistor networks in the signal
path. The outputs are 350mV compatible LVDS with
fast rise/fall times guaranteed to be less than 150ps.
The SY89838U operates from a 2.5V ±5% supply and
is guaranteed over the full industrial temperature range
of –40°C to +85°C. For applications that require
800mV LVPECL outputs, consider the SY89837U. The
SY89838U is part of Micrel’s high-speed, Precision
Edge
®
product line.
All support documentation can be found on Micrel’s
web site at:
www.micrel.com.
Precision Edge
®
Features
•
Selects between two clocks, and provides 8
precision, low skew LVDS output copies
•
2:1 MUX input provides a glitch-free, stable LVDS
output
•
Guaranteed AC performance over temperature and
supply voltage:
– Wide operating frequency: 1kHz to >1.5GHz
– <150ps t
r
/t
f
– <40ps output-to-output skew
•
Unique patent-pending input isolation design
minimizes crosstalk
•
Fail-safe input prevents oscillation
•
Ultra-low jitter design:
– <1ps
RMS
random jitter
– <1ps
RMS
cycle-to-cycle jitter
– <10ps
PP
total jitter (clock)
– <0.7ps
RMS
MUX crosstalk induced jitter
•
Unique patent-pending input termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
•
350mV LVDS output swing
•
Power supply 2.5V +5%
•
–40°C to +85°C industrial temperature range
•
Available in 32-pin (5mm x 5mm) QFN package
Applications
•
Redundant clock switchover
•
Failsafe clock protection
Markets
•
•
•
•
LAN/WAN
Enterprise Servers
ATE
Test and Measurements
Precision Edge is a registered trademark of Micrel, Inc
May 2008
M9999-051308-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89838U
Typical Application
May 2008
2
M9999-051308-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89838U
Ordering Information
(1)
Part Number
SY89838UMG
SY89838UMGTR
(2)
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= +25°C, DC Electrical only.
2. Tape and Reel.
Package
Type
QFN-32
QFN-32
Operating
Range
Industrial
Industrial
Package Marking
SY89838U with bar line
Pb-Free indicator
SY89838U with bar line
Pb-Free indicator
Lead
Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
32-Pin QFN
May 2008
3
M9999-051308-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89838U
Pin Description
Pin Number
1, 3,
6, 8
Pin Name
IN0, /IN0,
IN1, /IN1
Pin Function
Differential Inputs: These input pairs are the differential signal inputs to the
device. These inputs accept AC or DC-coupled signals as small as 100mV
(200mV
PP
). Each pin of a pair internally terminates to a VT pin through 50Ω.
Please refer to the “Input Interface Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates
to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network
for maximum interface flexibility. See the “Input Interface Applications” section
for more details.
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor
and will default to a logic HIGH state if left open. Input threshold is V
CC
/2.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close
to VCC pins as possible.
Differential Outputs: These LVDS output pairs are a logic function of the IN0,
IN1, and SEL inputs. Please refer to the truth table below for details. Unused
output pairs must be terminated with 100Ω across the pair.
Ground: Ground pin and exposed pad must be connected to the same ground
plane.
Power-On Reset (POR) Initialization capacitor. When using the multiplexer with
RPE capability, this pin is tied to a capacitor to VCC. The purpose is to ensure
the internal RPE logic starts up in a known state. See “Power-On Rest (POR)
Description” section for more details regarding capacitor selection. If this pin is
tied directly to VCC, the RPE function will be disabled and the multiplexer will
function as a normal multiplexer. The CAP pin should never be left open.
Reference Voltage: These outputs bias to V
CC
–1.2V. They are used for AC-
coupling inputs (IN, /IN). Connect VREF_AC directly to the VT pin. Bypass with
0.01µF low ESR capacitor to VCC. See “Input Interface Applications” section.
Maximum sink/source current is ±1.5mA.
2, 7
VT0, VT1
31
9, 19, 22, 32
30, 28, 26, 24,
18, 16, 14, 12,
29, 27, 25, 23,
17, 15, 13, 11
20, 21
SEL
VCC
Q0 – Q7,
/Q0 – /Q7
GND,
Exposed Pad
10
CAP
4, 5
VREF-AC0
VREF-AC1
Truth Table
Inputs
IN0
0
1
X
X
/IN0
1
0
X
X
IN1
X
X
0
1
/IN1
X
X
1
0
SEL
0
0
1
1
Outputs
Q
0
1
0
1
/Q
1
0
1
0
May 2008
4
M9999-051308-D
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89838U
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) ...........................-0.5V to +4.0V
Input Voltage (V
IN
) .................................. -0.5V to V
CC
Input Current
Source or sink current on IN, /IN.............. ±50mA
Termination Current
Source or sink current on V
T
.................. ±100mA
V
REF-AC
Source or sink current .......................... ±2mA
Lead Temperature (soldering, 20 sec.) ..........+260°C
Storage Temperature (T
s
)..................–65°C to 150°C
Operating Ratings
(2)
Supply Voltage (V
CC
).................. +2.375V to +2.625V
Ambient Temperature (T
A
) ................ –40°C to +85°C
Package Thermal Resistance
(3)
QFN (θ
JA
)
Still-Air .....................................................35°C/W
QFN (ψ
JB
)
Junction-to-Board ....................................16°C/W
DC Electrical Characteristics
(4)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
IN
R
DIFF_IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
IN_FSI
V
T_IN
V
REF-AC
Notes:
1.
Permanent device damage may occur if the absolute maximum ratings are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
θ
JA
and
ψ
JB
values are determined for a 4-layer board in still air, unless otherwise stated.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
V
IN
(max) is specified when V
T
is floating.
Parameter
Power Supply
Power Supply Current
Input Resistance
(IN-to-V
T
)
Differential Input Resistance
(IN-to-/IN)
Input High Voltage
(IN, /IN)
Input Low Voltage
(IN, /IN)
Input Voltage Swing
(IN, /IN)
Differential Input Voltage Swing
|IN-/IN|
Input Voltage Threshold that
Triggers FSI
IN-to-V
T
(IN, /IN)
Output Reference Voltage
Condition
No load, max. V
CC
Min
2.375
Typ
2.5
250
Max
2.625
350
55
110
V
CC
V
IH
–0.2
V
CC
Units
V
mA
Ω
Ω
V
V
V
V
45
90
1.2
0
See Figure 1a. Note 5
See Figure 1b.
0.2
0.4
50
100
30
100
1.8
mV
V
V
V
CC
–1.3
V
CC
–1.2
V
CC
–1.1
2.
3.
4.
5.
May 2008
5
M9999-051308-D
hbwhelp@micrel.com
or (408) 955-1690
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