SY89833L
3.3V Ultra-Precision 1:4 LVDS Fanout
Buffer/Translator with Internal Termination
General Description
The SY89833L is a 3.3V, high-speed 2GHz differential low
voltage differential swing (LVDS) 1:4 fanout buffer
optimized for ultra-low skew applications. Within device
skew is guaranteed to be less than 20ps over supply
voltage and temperature.
The differential input buffer has a unique internal
termination design that allows access to the termination
network through a VT pin. This feature allows the device to
easily interface to different logic standards. A VREF-AC
reference is included for AC-coupled applications.
The SY89833L is part of Micrel’s high-speed clock
synchronization family. For 2.5V applications, the
SY89832U provides similar functionality while operating
from a 2.5V ±5% supply. For applications that require a
different I/O combination, consult the Micrel website at
www.micrel.com,
and choose from a comprehensive
product line of high-speed, low-skew fanout buffers,
translators and clock generators.
Datasheets and support documentation are available on
Micrel’s web site at:
www.micrel.com.
Features
•
Guaranteed AC performance over temperature and
voltage:
−
DC-to > 2GHz throughput
−
<600ps propagation delay (IN-to-Q)
−
<20ps within-device skew
−
<150ps rise/fall times
•
Ultra-low jitter design:
−
98fs
RMS
phase jitter
•
Patented Any-In input termination and VT pin accepts
DC- and AC-coupled inputs
•
High-speed LVDS outputs
•
3.3V power supply operation:
−
Industrial temperature range: -40°C to +85°C
•
Available in 16-pin (3mm × 3mm) QFN package
Applications
•
•
•
•
Processor clock distribution
SONET clock distribution
Fibre Channel clock distribution
Gigabit Ethernet clock distribution
Functional Block Diagram
Typical Performance
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
September 10, 2014
Revision 3.0
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89833L
Ordering Information
(1)
Part Number
SY89833LMG
SY89833LMG TR
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
(2)
Package Type
QFN-16
QFN-16
Operating Range
Industrial
Industrial
Package Marking
833L with Pb-Free Bar Line Indicator
833L with Pb-Free Bar Line Indicator
Lead Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
16-Pin 3mm × 3mm QFN
Pin Description
Pin Number
15, 16
1, 2
3, 4
5, 6
Pin Name
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Pin Function
LVDS Differential Outputs: Normally terminated with 100Ω across the pair (Q, /Q). See “LVDS
Outputs” section. Unused outputs should be terminated with a 100Ω resistor across each pair.
8
EN
This single-ended TTL/CMOS-compatible input functions as a synchronous output enable. The
synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW
state. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to logic
HIGH state (enabled) if left open.
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC-
or DC-Coupled differential signals as small as 100mV. Each pin of a pair internally terminates to a VT
pin through 50Ω. Note that these inputs will default to an intermediate state if left open. Please refer to
the “Input Interface Applications” section for more details.
Reference Voltage: These outputs bias to V
CC
-1.4V.They are used when AC coupling the inputs (IN,
/IN). For AC-Coupled applications, connect VREF-AC to VT pin and bypass with 0.01µF low ESR
capacitor to V
CC
. See “Input Interface Applications” section for more details. Maximum sink/source
current is ±1.5mA. Due to the limited drive capability, each VREF-AC pin is only intended to drive its
respective VT pin.
9, 12
/IN, IN
10
VREF-AC
September 10, 2014
2
Revision 3.0
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89833L
Pin Description (Continued)
Pin Number
11
Pin Name
VT
Pin Function
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT
pins provide a center-tap to a termination network for maximum interface flexibility. See “Input
Interface Applications” section for more details.
Ground. GND pins and exposed pad must be connected to the most negative potential of the device
ground.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors and place as close to each
VCC pin as possible.
13
7, 14
GND
VCC
Truth Tables
IN
0
1
X
Note:
3. On next negative transition of the input signal (IN).
/IN
1
0
X
EN
1
1
0
Q
0
1
0
(3)
/Q
1
0
1
(3)
September 10, 2014
3
Revision 3.0
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89833L
Absolute Maximum Ratings
(4)
Supply Voltage (V
CC
) ....................................
−0.5V
to +4.0V
Input Voltage (V
IN
) ..................................
−0.5
to VCC +0.3V
LVDS Output Current (I
OUT
) ....................................... +10mA
Input Current
Source or Sink Current on (I
VT
) ............................. ±2mA
Maximum Operating Junction Temperature............... 125°C
Lead Temperature (Soldering, 20 s) .......................... 260°C
Storage Temperature (T
S
) .........................
−65°C
to +150°C
Operating Ratings
(5)
Supply Voltage Range ................................. +3.0V to +3.6V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
(6)
Junction Thermal Resistance
QFN (θJ
A
)
Still-Air ........................................................... 60°C/W
QFN (ΨJ
B
).......................................................... 33°C/W
Electrical Characteristics
(7)
T
A
=
−40°C
to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
IN
R
DIFF-IN
V
IH
V
IL
V
IN
V
DIFF_IN
|IIN|
V
REF-AC
Notes:
4.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB.
ψ
JB
and
θ
JA
values
are determined for a 4-layer board in still-air number, unless otherwise stated.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Due to the internal termination (see "Input Buffer Structure" section) the input current depends on the applied voltages at IN, /IN and VT inputs. Do
not apply a combination of voltages that causes the input current to exceed the maximum limit.
Parameter
Power Supply Voltage Range
Power Supply Current
Input Resistance (IN-to-VT)
Differential Input Resistance
(IN-to-/IN)
Input HIGH Voltage (IN-to-/IN)
Input LOW Voltage (IN-to-/IN)
Input Voltage Swing (IN-to-/IN)
Differential Input Voltage
Input Current (IN, /IN)
Reference Voltage
Condition
Min.
3.0
Typ.
3.3
75
Max.
3.6
100
55
110
V
CC
+ 0.3
V
IH
– 0.1
V
CC
Units
V
mA
Ω
Ω
V
V
V
V
No load, maximum V
CC
45
90
0.1
−0.3
Note 8,
see
Figure 4.
Note 8,
see
Figure 5.
Note 8.
V
CC
−
1.525
0.1
0.2
50
100
45
V
CC
−
1.425
V
CC
−
1.325
mA
V
5.
6.
7.
8.
September 10, 2014
4
Revision 3.0
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89833L
LVDS Outputs DC Electrical Characteristics
(9)
V
CC
= 3.3V±10%, R
L
= 100Ω across the outputs; T
A
= -40°C to +85°C.
Symbol
V
OUT
V
DIFF_OUT
V
OCM
∆V
OCM
Note:
9. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Output Voltage Swing
Differential Output Voltage Swing
Output Common Mode Voltage
Change in Common Mode Voltage
Condition
See
Figure 4.
See
Figure 5.
Min.
250
500
1.125
−50
Typ.
325
650
Max.
Units
mV
mV
1.275
50
V
mV
LVTTL/CMOS DC Electrical Characteristics
(9)
V
CC
= 3.3V±10%, T
A
= -40°C to +85°C.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min.
2.0
0
−125
Typ.
Max.
V
CC
0.8
30
-300
Units
V
V
V
mV
AC Electrical Characteristics
(10)
V
CC
= 3.3V±10%, R
L
= 100Ω across the outputs; T
A
= -40°C to +85°C unless otherwise stated
Symbol
f
MAX
t
pd
Parameter
Maximum Frequency
Propagation Delay
Within-Device Skew
Part-to-Part Skew
Set-up Time
Hold Time
Additive Jitter
Output Rise/Fall Times
(20% to 80%)
EN to IN, /IN
EN to IN, /IN
IN-to-Q
Condition
V
OUT
≥ 200mV
V
IN
< 400mV
V
IN
≥ 400mV
Note 11
Note 12
Note 13
Note 13
Output = 622MHz
Integration Range: 12kHz – 20MHz
At full output swing.
60
300
500
98
110
190
Min
2.0
400
330
500
440
4
600
530
20
200
Typ
Max
Units
GHz
ps
ps
ps
ps
ps
ps
fs
ps
t
SKEW
t
S
t
H
t
JITTER
t
r
, t
f
Notes:
10. High-frequency AC parameters are guaranteed by design and characterization.
11. Within device skew is measured between two different outputs under identical input transitions.
12. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
13. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,
set-up and hold times do not apply.
September 10, 2014
5
Revision 3.0
hbwhelp@micrel.com
or (408) 955-1690
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