Micrel, Inc.
2.5V/3.3V/5V 1:5 LVPECL/PECL/
ECL/HSTL 2GHz CLOCK DRIVER
WITH 2:1 DIFFERENTIAL INPUT MUX
Precision Edge
®
SY100EP14U
Precision Edge
®
SY100EP14U
FEATURES
•
•
•
•
•
•
•
•
•
Guaranteed AC parameters over temp/voltage:
•
> 2GHz f
MAX
•
< 25ps within-device skew
•
< 275ps tr/tf time
•
< 525ps prop delay
2:1 Differential MUX input
Flexible supply voltage: 2.5V/3.3V/5V
Wide operating temperature range: –40
°
C to +85
°
C
V
BB
reference for single-ended or AC-coupled
PECL inputs
100K ECL compatible outputs
Inputs accept PECL/LVPECL/ECL/HSTL logic
75kΩ internal input pull-down resistors
Ω
Available in a 20-Pin TSSOP package
ECL Pro™
DESCRIPTION
The SY100EP14U is a high-speed, 2GHz differential
PECL/ECL 1:5 fanout buffer optimized for ultra-low skew
applications. Within device skew is guaranteed to be less
than 25ps over temperature and supply voltage. The wide
supply voltage operation allows this fanout buffer to operate
in 2.5V, 3.3V, and 5V systems. A V
BB
reference is included
for single-supply or AC-coupled PECL/ECL input
applications, thus eliminating resistor networks. When
interfacing to a single-ended or AC-coupled PECL/ECL input
signal, connect the V
BB
pin to the unused /CLK pin, and
bypass the pin to V
CC
through a 0.01µF capacitor.
The SY100EP14U features a 2:1 input MUX, making it
an ideal solution for redundant clock switchover applications.
If only one input pair is used, the other pair may be left
floating. In addition, this device includes a synchronous
enable pin that forces the outputs into a fixed logic state.
Enable or disable state is initiated only after the outputs are
in a LOW state, thus eliminating the possibility of a “runt”
clock pulse.
The SY100EP14U I/O are fully differential and 100K ECL
compatible. Differential 10K ECL logic can interface directly
into the SY100EP14U inputs.
The SY100EP14U is part of Micrel’s high-speed clock
synchronization family. For applications that require a
different I/O combination, consult the Micrel website at
www.micrel.com, and choose from a comprehensive product
line of high-speed, low-skew fanout buffers, translators, and
clock generators.
ECL Pro is a trademarks of Micrel, Inc.
Precision Edge is a registered trademarks of Micrel, Inc.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
1
Rev.: G
Amendment: /0
Issue Date: May 2010
Micrel, Inc.
Precision Edge
®
SY100EP14U
PACKAGE/ORDERING INFORMATION
VCC /EN VCC
20
19
D
Q
18
/CLK1
17
CLK1
16
1
VBB
15
0
CLK0
/CLK0
SEL VEE
14
13
12
11
Ordering Information
(1)
Part Number
SY100EP14UK4C
SY100EP14UK4CTR
(2)
SY100EP14UK4I
SY100EP14UK4ITR
(2)
Package
Type
K4-20-1
K4-20-1
K4-20-1
K4-20-1
K4-20-1
K4-20-1
Operating
Range
Commercial
Commercial
Industrial
Industrial
Industrial
Industrial
Package
Marking
XEP14U
XEP14U
XEP14U
XEP14U
XEP14U with
Pb-Free bar line indicator
XEP14U with
Pb-Free bar line indicator
1
Q0
2
/Q0
3
Q1
4
/Q1
5
Q2
6
/Q2
7
Q3
8
/Q3
9
Q4
10
/Q4
SY100EP14UK4G
(3)
SY100EP14UK4GTR
(2, 3)
Notes:
1.
2.
3.
20-Pin TSSOP
Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
Tape and Reel.
Pb-Free package is recommended for new designs.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
Precision Edge
®
SY100EP14U
PIN DESCRIPTION
Pin
CLK0, /CLK0
CLK1, /CLK1
Function
PECL, LVPECL, ECL, LVECL, HSTL Clock or Data Inputs.
Internal 75kΩ pull-down resistors on CLK0, CLK1, and internal 75kΩ pull-up and 75kΩ pull-down resistors or
/CLK0, /CLK1. For single-ended applications, connect signal into CLK0 and/or CLK1 inputs. /CLK0, /CLK1
default condition is V
CC
/2 when left floating. CLK0, CLK1 default condition is LOW when left floating.
LVPECL, PECL, ECL Differential Outputs: Terminate with 50Ω to V
CC
–2V. For single-ended applications,
terminate the unused output with 50Ω to V
CC
–2V
LVPECL, PECL, ECL compatible synchronous enable: When /EN goes HIGH, the Q
OUT
will go LOW and
/Q
OUT
will go HIGH on the next LOW input clock transition. Includes a 75kΩ pull-down. Default state is LOW
when left floating. The internal latch is clocked on the falling edge of the input clock (CLK0, CLK1)
LVPECL, PECL, ECL compatible 2:1 Mux input signal select: When SEL is LOW, CLK0 input pair is selected.
When SEL is HIGH, CLK1 input pair is selected. Includes a 75kΩ pull-down. Default state is LOW and
CLK0 is selected.
Output Reference Voltage: Equal to V
CC
–1.7V (approx.), and used for single-ended input signals or
AC-coupled applications. For single-ended PECL, LVPECL applications, bypass with a 0.01µF to V
CC
.
For single-ended LVTTL inputs, bypass to GND. Max. sink/source current is 0.5mA.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors.
Negative Power Supply: LVPECL, PECL applications, connect to GND.
Q0 to Q4
/Q0 to /Q4
/EN
SEL
V
BB
V
CC
V
EE
TRUTH TABLE
(1)
CLK0
L
H
X
X
X
Note 1.
FUNCTION TABLE
CLK_SEL
L
L
H
H
X
/EN
L
L
L
L
H
Q
L
H
L
H
L*
CLK_SEL
0
1
Active Input
CLK0, /CLK0
CLK1, /CLK1
CLK1
X
X
L
H
X
On next negative transition of CLK0 or CLK1.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
Precision Edge
®
SY100EP14U
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CC
– V
EE
V
IN
I
OUT
I
BB
T
LEAD
T
A
T
store
ESD
θ
JA
Rating
Power Supply Voltage
Input Voltage (V
CC
= 0V, V
IN
not more negative than V
EE
)
Input Voltage (V
EE
= 0V, V
IN
not more positive than V
CC
)
Output Current
V
BB
Sink/Source Current
(2)
Lead Temperature (soldering, 20sec.)
Operating Temperature Range
Storage Temperature Range
Mil Std. 883 Human Body Model, All Pins
Package Thermal Resistance
(Junction-to-Ambient)
Package Thermal Resistance
(Junction-to-Case)
–Still-Air (single-layer PCB)
–Still-Air (multi-layer PCB)
–500lfpm (multi-layer PCB)
–Continuous
–Surge
Value
6.0
–6.0 to 0
+6.0 to 0
50
100
±0.5
+260
–40 to +85
–65 to +150
>1.5k
115
75
65
21
Unit
V
V
mA
mA
°C
°C
°C
V
°C/W
°C/W
θ
JC
Note 1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions
for extended periods may affect device reliability.
Due to the limited drive capability, use for inputs of same package only.
Note 2.
DC ELECTRICAL CHARACTERISTICS
(1)
T
A
= –40
°
C
Symbol
V
CC
Parameter
Power Supply Voltage
(PECL)
(LVPECL)
(ECL)
(LVECL)
Power Supply Current
Input HIGH Current
Input LOW Current
D
/D
Min.
4.5
2.37
–4.5
–3.8
—
—
0.5
–150
—
Typ.
5.0
3.3
–5.0
–3.3
—
—
—
—
—
Max.
5.5
3.8
–5.5
–2.37
75
150
—
—
—
Min.
4.5
2.37
–4.5
–3.8
—
—
0.5
–150
—
T
A
= +25
°
C
Typ.
5.0
3.3
–5.0
–3.3
68
—
—
—
0.75
Max.
5.5
3.8
–5.5
–2.37
78
150
—
—
—
Min.
4.5
2.37
–4.5
–3.8
—
—
0.5
–150
—
T
A
= +85
°
C
Typ.
5.0
3.3
–5.0
–3.3
—
—
—
—
—
Max.
5.5
3.8
–5.5
–2.37
82
150
—
—
—
Unit
V
Condition
I
CC
I
IH
I
IL
C
IN
Note 1.
mA
µA
µA
µA
pF
V
IN
= V
IH
V
IN
= V
IL
V
IN
= V
IL
Input Capacitance (TSSOP)
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY100EP14U
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 2.5V
±5%,
V
EE
= 0V
T
A
= –40
°
C
Symbol
V
IL
V
IH
V
OL
V
OH
V
IHCMR
Note 1.
T
A
= +25
°
C
Max.
875
1620
805
1605
V
CC
Min.
555
1335
555
1355
1.2
Typ.
—
—
680
1480
—
Max.
875
1620
805
1605
V
CC
Min.
555
T
A
= +85
°
C
Typ.
—
—
680
1480
—
Max.
875
1620
805
1605
V
CC
Unit
mV
mV
mV
V
50Ω to V
CC
–2V
Condition
Parameter
Input LOW Voltage
(2)
(Single-ended)
Input HIGH Voltage
(2)
(Single-ended)
Output LOW Voltage
Output HIGH Voltage
Input HIGH Voltage
Common Mode Range
(3)
Min.
555
1335
555
1355
1.2
Typ.
—
—
680
1480
—
1335
555
1355
1.2
mV 50Ω to V
CC
–2V
Note 2.
Note 3.
V
BB
reference is not functional for V
CC
< 3.0V. External V
BB
equivalent is required.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies
1:1 with V
CC
.
V
IHCMR
(min) varies 1:1 with V
EE
, V
IHCMR
(Max) varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differen-
tial input signal.
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 3.3V
±10%;
V
EE
= 0V
T
A
= –40
°
C
Symbol
V
IL
V
IH
V
OL
V
OH
V
BB
V
IHCMR
Note 1.
T
A
= +25
°
C
Max.
1675
2420
1605
2405
1975
V
CC
Min.
1355
2075
1355
2155
1775
1.2
Typ.
—
—
1480
2280
1875
—
Max.
1675
2420
1605
2405
1975
V
CC
Min.
T
A
= +85
°
C
Typ.
—
—
1480
2280
1875
—
Max.
1675
2420
1605
2405
1975
V
CC
Unit
mV
mV
mV
mV
mV
V
50Ω to V
CC
–2V
50Ω to V
CC
–2V
V
CC
= 3.3V
Condition
1355
2075
1355
2155
1775
1.2
Parameter
Input LOW Voltage
(Single-Ended)
Input HIGH Voltage
(Single-Ended)
Output LOW Voltage
Output HIGH Voltage
Reference Voltage
(2)
Input HIGH Voltage
Common Mode Range
(3)
Min.
1355
2075
1355
2155
1775
1.2
Typ.
—
—
1480
2280
1875
—
Note 2.
Note 3.
V
IHCMR
(min) varies 1:1 with V
EE
, V
IHCMR
(Max) varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differen-
tial input signal.
Single-ended input operation is limited V
CC
≥
3.0V in LVPECL mode. V
BB
reference varies 1:1 with V
CC
.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies
1:1 with V
CC
.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
5
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