MIC37150/51/52/53
1.5A, Low Voltage µCap LDO Regulator
General Description
The Micrel MIC37150/51/52/53 is a 1.5A low-dropout
linear voltage regulator that provides a low voltage, high
current output with a minimum of external components. It
offers high precision, ultra-low dropout (500mV over
temperature), and low ground current.
The MIC37150/51/52/53 operates from an input of 2.25V
to 6.0V. It is designed to drive digital circuits requiring low
voltage at high currents (i.e., PLDs, DSPs, micro-
controllers, etc.). It is available in
fixed
and adjustable
output voltages. Fixed voltages include 1.5V, 1.65V, 1.8V,
2.5V and 3.3V. The adjustable version is capable of
supplying output voltages from 1.24V to 5.5V.
Features of the MIC37150/51/52/53 LDO include thermal
and current limit protection, and reverse current and
reverse battery protection. Logic enable and error
flag
pins
are available.
Junction temperature range of the MIC37150/51/52/53 is
from –40°C to +125°C.
For applications requiring input voltage greater than 6.0V,
see MIC3910x, MIC3915x, MIC3930x, and MIC3950x
LDOs.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Features
•
1.5A minimum guaranteed output current
•
500mV maximum dropout voltage over temperature
–
Ideal for 3.0V to 2.5V conversion
–
Ideal for 2.5V to 1.8V, 1.65V, or 1.5V conversion
•
Stable with ceramic or tantalum capacitor
•
Wide input voltage range
– VIN: 2.25V to 6.0V
•
±1.0% initial output tolerance
•
Fixed and adjustable output voltages
– MIC37150—3-pin
fixed
voltages
– MIC37151—5-pin S-Pak or 8-pin e-Pad SOIC
fixed
voltages with flag
– MIC37152—5-pin adjustable voltage
– MIC37153—8-pin adjustable voltage with flag
•
Excellent line and load regulation specifications
•
Logic controlled shutdown
•
Thermal shutdown and current limit protection
•
Reverse-leakage protection
•
Low profile 3 or 5-pin S-Pak packages or 8-pin e-Pad
SOIC
Applications
•
•
•
•
•
LDO linear regulator for low-voltage digital IC
PC add-in cards
High efficiency linear power supplies
SMPS post regulator
Battery charger
Typical Application
V
IN
= 3.0V
C
IN
VEN
GND
FLG
MIC37151
VIN
VOUT
100k
V
OUT
= 2.5V
C
OUT
47µF, Ceramic
V
IN
C
IN
MIC37152
VIN
VOUT
R1
VEN
GND
ADJ
R2
1.3V
C
OUT
47µF, Ceramic
Fixed 2.5V Regulator with Error Flag
Super ßeta PNP is a trademark of Micrel, Inc.
Adjustable Regulator
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
October 2007
M9999-101907
Micrel, Inc.
MIC37150/51/52/53
Pin Configuration
3
TAB
VOUT
GND
VIN
TAB
2
1
5
4
3
2
1
FLG/ADJ
VOUT
GND
VIN
EN
S-PAK-3 (R)
S-PAK-5 (R)
EN 1
VIN 2
VOUT 3
ADJ 4
8
7
6
5
GND
GND
GND
GND
GND 1
EN 2
VIN 3
NC 4
8 FLG
7 VOUT/ADJ
6 VOUT
5 NC
SOIC-8 (M)
e-Pad SOIC-8 (ME)
Pin Description
Pin Number
S-PAK-3
–
1
2
3
–
Pin Number
S-PAK-5
1
2
3
4
5
Pin Number
SOIC-8
1
2
5, 6, 7, 8
3
–
4
Pin Number
e-Pad SOIC-8
2
3
1
6, 7 (Fixed)
6 (Adj)
8
7
4, 5
Pin Name
EN
VIN
GND
VOUT
FLG
ADJ
NC
Pin Name
Enable (Input): CMOS compatible input.
Logic high = enable, logic low = shutdown.
Input voltage which supplies current to the output
power device.
Ground (TAB is connected to ground on S-Pak)
Regulator Output
Error Flag (Output): Open collector output.
Active low indicates an output fault condition.
Adjustable regulator feedback input.
Connect to resistor voltage divider.
Not internally connected.
–
–
–
October 2007
3
M9999-101907
Micrel, Inc.
MIC37150/51/52/53
Absolute Maximum Ratings
(1)
Supply Voltage (V
IN
) ......................................................6.5V
Enable Input Voltage (V
EN
)............................................6.5V
Power Dissipation .....................................Internally Limited
Junction Temperature .........................–40°C
≤
T
J
≤
+125°C
Storage Temperature (T
s
) ...................–65°C
≤
T
J
≤
+150°C
Lead Temperature (soldering, 5sec.)......................... 260°C
EDS Rating................................................................
Note 3
Operating Ratings
(2)
Supply voltage (V
IN
) ....................................... 2.25V to 6.0V
Enable Input Voltage (V
EN
).................................. 0V to 6.0V
Junction Temperature Range .............–40°C
≤
T
J
≤
+125°C
Maximum Power Dissipation.....................................
Note 4
Package Thermal Resistance
S-Pak (θ
JC
) ..........................................................2°C/W
Power SOIC-8 (θ
JA
) ...........................................63°C/W
e-Pad SOIC-8 (θ
JC
)............................................10°C/W
Electrical Characteristics
(5)
T
A
= 25°C with V
IN
= V
OUT
+ 1V; V
EN
= V
IN
;
bold
values indicate –40°C < T
J
< +125°C, unless otherwise noted.
Parameter
Output Voltage Accuracy
Output Voltage Line Regulation
Output Voltage Load Regulation
V
IN
– V
OUT
; Dropout Voltage,
Note 6
Ground Pin Current,
Note 7
Ground Pin Current in Shutdown
Current Limit
Start-up Time
Condition
I
L
= 10mA
10mA < I
OUT
< I
L(max)
, V
OUT
+ 1
≤
V
IN
≤
6V
V
IN
= V
OUT
+1.0V to 6.0V
I
L
= 10mA to 1.5A
I
L
= 750mA
I
L
= 1.5A
I
L
= 1.5A
V
IL
≤
0.5V, V
IN
= V
OUT
+ 1V
V
OUT
= 0
V
EN
= V
IN
, I
OUT
= 10mA, C
OUT
= 22µF
Regulator enable
Regulator shutdown
V
IL
≤
0.8V (regulator shutdown)
V
IH
≥
2.25V (regulator enabled)
Min
–1
Typ
Max
+1
Units
%
%
%
%
mV
mV
mA
µA
A
µs
V
–2
0.06
0.2
+2
0.5
1
350
500
17
1.0
2.25
170
30
4.0
500
Enable Input
Enable Input Threshold
Enable Pin Input Current
2.25
0.8
2
4
1
15
30
75
1
2
210
93
2
99.2
1.228
1.240
1.252
300
400
V
µA
µA
µA
µA
µA
µA
mV
mV
%
%
%
V
V
ppm/°C
Flag Output
I
FLG(LEAK)
V
FLG(LO)
V
FLG
V
OH
= 6V
V
IN
= 2.25V, I
OL
= 250µA,
Note 8
Low threshold, % of V
OUT
below nominal
Hysteresis
High threshold, % of V
OUT
below nominal
Reference Voltage
Note 9
Reference Voltage Temp.
Coefficient
Adjust Pin Bias Current
Adjust Pin Bias Current Temp.
Coefficient
1.215
20
40
0.1
1.265
Note 10
80
120
nA
nA
nA/°C
October 2007
4
M9999-101907
Micrel, Inc.
MIC37150/51/52/53
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Exceeding the absolute maximum rating may damage the device.
The device is not guaranteed to function outside its operating rating.
Devices are ESD sensitive. Handling precautions recommended.
P
D(MAX)
= (T
J(MAX)
– T
A
) /
θ
JA
, where
θ
JA
, depends upon the printed circuit layout. See “Applications Information.”
Specification for packaged product only.
V
DO
= V
IN
– V
OUT
when V
OUT
decreased to 98% of its nominal output voltage with V
IN
= V
OUT
+1V. For output voltages below 1.75V, dropout voltage
specification does not apply due to a minimum input operating voltage of 2.25V.
I
IN
is the quiescent current. I
IN
= I
IN
+ I
OUT
.
For a 2.5V device, V
IN
= 2.250V (device is in dropout).
V
REF
≤
V
OUT
≤
(V
IN
–1.0V), 2.25V
≤
V
IN
≤
6.0V, 10mA
≤
I
L
≤
1.5A, T
J
= T
MAX
.
10. Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, excluding load or line
regulation effects. Specifications are for a 200mA load pulse at V
IN
= 6V for t = 10ms.
October 2007
5
M9999-101907
FPGA/CPLD
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