Small Signal Field-Effect Transistor, P-Channel, Metal-oxide Semiconductor FET
SI7409DN-T1-E3规格参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Vishay(威世)
包装说明
,
Reach Compliance Code
compliant
ECCN代码
EAR99
配置
Single
最大漏极电流 (Abs) (ID)
7 A
最大漏极电流 (ID)
7 A
FET 技术
METAL-OXIDE SEMICONDUCTOR
JESD-609代码
e3
湿度敏感等级
1
最高工作温度
150 °C
极性/信道类型
P-CHANNEL
最大功率耗散 (Abs)
3.8 W
表面贴装
YES
端子面层
Matte Tin (Sn)
SI7409DN-T1-E3文档预览
Si7409DN
Vishay Siliconix
P-Channel 30-V (D-S) MOSFET
PRODUCT SUMMARY
V
DS
(V)
−30
FEATURES
I
D
(A)
−11
−8.5
r
DS(on)
(W)
0.019 @ V
GS
=
−4.5
V
0.031 @ V
GS
=
−2.5
V
Q
g
(Typ)
25
D
TrenchFETr Power MOSFET
Available
D
New Low Thermal Resistance
PowerPAKrPackage with Low 1.07-mm Profile
D
V
DS
Optimized for Load Switch
D
Lead (Pb)-Free Version is RoHS Compliant
APPLICATIONS
D
Load Switch
PowerPAK 1212-8
S
3.30 mm
S
1
2
S
3
S
4
D
8
7
D
6
D
5
D
G
3.30 mm
G
D
P-Channel MOSFET
Bottom View
Ordering Information: Si7409DN-T1
Si7409DN-T1—E3 (Lead (Pb)-Free)
ABSOLUTE MAXIMUM RATINGS (T
A
= 25_C UNLESS OTHERWISE NOTED)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150_C)
a
Pulsed Drain Current
continuous Source Current (Diode Conduction)
a
Maximum Power Dissipation
a
Operating Junction and Storage Temperature Range
T
A
= 25_C
T
A
= 85_C
T
A
= 25_C
T
A
= 85_C
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
stg
10 secs
Steady State
−30
"12
Unit
V
−11
−7.9
−40
−3.2
3.8
2.0
−55
to 150
−7
−5
A
−1.3
1.5
0.8
W
_C
THERMAL RESISTANCE RATINGS
Parameter
Maximum J
M i
Junction-to-Ambient
a
ti t A bi t
Maximum Junction-to-Case
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
Document Number: 72127
S-50695—Rev. C, 18-Apr-05
www.vishay.com
t
v
10 sec
Steady State
Steady State
Symbol
R
thJA
R
thJC
Typical
26
65
1.9
Maximum
33
81
2.4
Unit
_C/W
C/W
1
Si7409DN
Vishay Siliconix
SPECIFICATIONS (T
J
= 25_C UNLESS OTHERWISE NOTED)
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State
Drain Source On State Resistance
a
Forward Transconductance
a
Diode Forward
Voltage
a
V
GS(th)
I
GSS
I
DSS
I
D(on)
r
DS( )
DS(on)
g
fs
V
SD
V
DS
= V
GS
, I
D
=
−250
mA
V
DS
= 0 V, V
GS
=
"12
V
V
DS
=
−30
V, V
GS
= 0 V
V
DS
=
−30
V, V
GS
= 0 V, T
J
= 85_C
V
DS
v
−5
V, V
GS
=
−4.5
V
V
GS
=
−4.5
V, I
D
=
−11
A
V
GS
=
−2.5
V, I
D
=
−8.5
A
V
DS
=
−15
V, I
D
=
−11
A
I
S
=
−3.2
A, V
GS
= 0 V
−40
0.0015
0.025
40
−0.7
−1.2
0.019
0.031
−0.6
−1.5
"100
−1
−5
V
nA
mA
A
W
S
V
Symbol
Test Condition
Min
Typ
Max
Unit
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
t
rr
I
F
=
−3.2
A, di/dt = 100 A/ms
V
DD
=
−15
V, R
L
= 15
W
I
D
^
−1
A, V
GEN
=
−4.5
V, R
g
= 6
W
V
DS
=
−15
V, V
GS
=
−4.5
V, I
D
=
−11
A
,
,
25
5
9
30
50
115
75
60
45
75
175
115
90
ns
40
nC
Notes
a. Pulse test; pulse width
v
300
ms,
duty cycle
v
2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
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