Freescale Semiconductor
Advance Information
Document Number: MC35XS3400
Rev. 8.0, 1/2011
Quad High Side Switch
(Quad 35 mOhm)
The 35XS3400 is one in a family of devices designed for low-voltage
automotive lighting applications. Its four low R
DS(ON)
MOSFETs (quad
35 mOhm) can control four separate 28 W bulbs, and/or LEDs.
Programming, control and diagnostics are accomplished using a
16-bit SPI interface. Its output with selectable slew-rate improves
electromagnetic compatibility (EMC) behavior. Additionally, each
output has its own parallel input or SPI control for pulse-width
modulation (PWM) control if desired. The 35XS3400 allows the user to
program via the SPI the fault current trip levels and duration of
acceptable lamp inrush. The device has Fail-safe mode to provide fail-
safe functionality of the outputs in case of MCU damaged.
Features
• Four protected 35 mΩ high side switches (at 25°C)
• Operating voltage range of 6.0 V to 20 V with standby current <
5.0
μA,
extended mode from 4.0 V to 28 V
• 8.0 MHz 16-bit 3.3 V and 5.0 V SPI control and status reporting
with daisy chain capability
• PWM module using external clock or calibratable internal
oscillator with programmable outputs delay management
• Smart over-current shutdown, severe short-circuit, over-
temperature protections with time limited autoretry, and Fail-safe
mode in case of MCU damage
• Output OFF or ON open-load detection compliant to bulbs or
LEDs and short to battery detection. Analog current feedback
with selectable ratio and board temperature feedback.
• Pb-free packaging designated by suffix code DPNA
35XS3400
HIGH SIDE SWITCH
PNA SUFFIX (PB-FREE)
98ARL10596D
24-PIN PQFN
ORDERING INFORMATION
Device
MC35XS3400CPNA
MC35XS3400DPNA
Temperature
Range (T
A
)
- 40°C to 125°C
Package
24 PQFN
V
DD
V
DD
V
PWR
V
DD
V
PWR
35XS3400
VDD
I/O
SCLK
CS
SI
I/O
MCU
SO
I/O
I/O
I/O
I/O
A/D
GND
WAKE
FS
SCLK
CS
SO
RST
SI
IN0
IN1
IN2
IN3
CSNS
FSI
GND
VPWR
HS0
LOAD
HS1
LOAD
HS2
LOAD
HS3
LOAD
Figure 1. 35XS3400 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2008 - 2011. All rights reserved.
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. Device Variations
Characteristic
Wake Input Clamp Voltage, I
CL(WAKE)
< 2.5 mA
35XS3400C
35XS3400D
Fault Detection Blanking Time
35XS3400C
35XS3400D
Output Shutdown Delay Time
35XS3400C
35XS3400D
Peak Package Reflow Temperature During Reflow
(1)
,
(2)
1.
2.
T
PPRT
t
DETECT
-
-
7.0
7.0
Note 2
30
20
°C
Symbol
V
CL(WAKE)
18
20
25
27
32
35
μs
-
-
5.0
5.0
20
10
μs
Min
Typ
Max
Unit
V
t
FAULT
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits
may cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics.
35XS3400
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VDD
VPWR
I
UP
CS
SCLK
I
DWN
SO
SI
RST
WAKE
FS
IN0
IN1
IN2
IN3
V
DD
Failure
Detection
Internal
Regulator
V
REG
POR
Over/Under-voltage
Protections
Charge
Pump
VPWR
Voltage Clamp
Selectable Slew Rate
Gate Driver
Selectable Over-current
Detection
Severe Short-circuit
Detection
Short to VPWR
Detection
Over-temperature
Detection
Open-load
Detections
HS0
Logic
HS0
R
DWN
I
DWN
R
DWN
HS1
Calibratable
Oscillator
V
REG
PWM
Module
HS1
HS2
HS2
HS3
FSI
Programmable
Watchdog
Temperature
Feedback
Over-temperature
Prewarning
Analog MUX
V
DD
HS3
Selectable Output
Current Recopy
GND
CSNS
Figure 2. 35XS3400 Simplified Internal Block Diagram
35XS3400
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
Transparent Top View of Package
WAKE
CSNS
1
24
14
GND
23
FSI
GND
22
HS2
Definition
This pin reports an analog value proportional to the designated HS[0:3] output
current or the temperature of the GND flag (pin 14). It is used externally to
generate a ground-referenced voltage for the microcontroller (MCU) . Current
recopy and temperature feedback is SPI programmable.
Each direct input controls the device mode. The IN[0 : 3] high side input pins
are used to directly control HS0 : HS3 high side output pins.
The PWM frequency can be generated from IN0 pin to PWM module in case
the external clock is set.
Output
Input
Input
Input
Input
Input
Fault Status
(Active Low)
Wake
Reset
Chip Select
(Active Low)
Serial Clock
Serial Input
This pin is an open drain configured output requiring an external pull-up
resistor to V
DD
for fault reporting.
This input pin controls the device mode.
This input pin is used to initialize the device configuration and fault registers,
as well as place the device in a low-current Sleep mode.
This input pin is connected to a chip select output of a master microcontroller
(MCU).
This input pin is connected to the MCU providing the required bit shift clock for
SPI communication.
This pin is a command data input pin connected to the SPI serial data output
of the MCU or to the SO pin of the previous device of a daisy
-
chain of devices.
SCLK
VDD
RST
IN3
IN2
IN1
3
13 12 11 10
SO
GND
16
17
9
8
7
6
5
4
HS3
18
15
VPWR
19
20
21
HS1
NC
HS0
Figure 3. 35XS3400 Pin Connections
Table 2. 35XS3400 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page
19.
Pin
Number
1
Pin Name
CSNS
Pin
Function
Output
Formal Name
Output Current
Monitoring
2
3
5
6
7
8
9
10
11
12
IN0
IN1
IN2
IN3
FS
WAKE
RST
CS
SCLK
SI
Input
Direct Inputs
35XS3400
IN0
2
NC
CS
FS
SI
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
Table 2. 35XS3400 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page
19.
Pin
Number
13
14, 17, 23
15
16
18
19
21
22
4, 20
24
Pin Name
VDD
GND
VPWR
SO
HS3
HS1
HS0
HS2
NC
FSI
Pin
Function
Power
Ground
Power
Output
Output
Formal Name
Digital Drain Voltage
Ground
Definition
This pin is an external voltage input pin used to supply power interfaces to the
SPI bus.
These pins, internally shorted, are the ground for the logic and analog circuitry
of the device. These ground pins must be also shorted in the board.
Positive Power Supply This pin connects to the positive power supply and is the source of operational
power for the device.
Serial Output
High Side Outputs
This output pin is connected to the SPI serial data input pin of the MCU or to
the SI pin of the next device of a daisy
-
chain of devices.
Protected 35 mΩ high side power output pins to the load.
N/A
Input
No Connect
Fail-safe Input
These pins may not be connected.
This input enables the watchdog timeout feature.
35XS3400
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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