Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5646C
Rev. 4, 07/2011
MPC5646C
176-pin LQFP
(24 mm x 24 mm)
208-pin LQFP
(28 mm x 28 mm)
MPC5646C Microcontroller
Datasheet
On-chip modules available within the family include the
following features:
• e200z4d dual issue, 32-bit core Power Architecture
compliant CPU
• Up to 120 MHz
• 4 KB, 2/4-Way Set Associative Instruction Cache
• Variable length encoding (VLE)
• Embedded floating-point (FPU) unit
• Supports Nexus3+
• e200z0h single issue, 32-bit core Power Architecture
compliant CPU
• Up to 80 MHz
• Variable length encoding (VLE)
• Supports Nexus3+
• Up to 3 MB on-chip flash memory: flash page buffers to
improve access time
• Up to 256 KB on-chip SRAM
• 64 KB on-chip data flash memory to support EEPROM
emulation
• Up to 16 semaphores across all slave ports
• User selectable MBIST
• Low-power modes supported: STOP, HALT, STANDBY
• 16 region Memory Protection Unit (MPU)
• Dual-core Interrupt Controller (INTC). Interrupt sources
can be routed to e200z4d, e200z0h, or both
• Frequency-Modulated Phase-Locked Loop (FMPLL)
• Crossbar switch architecture for concurrent access to
peripherals, flash memory, and SRAM from multiple bus
masters
• 32 channel eDMA controller with DMAMUX
• Timer supports input/output channels providing 16-bit input
capture, output compare, and PWM functions (eMIOS)
• 2 analog-to-digital converters (ADC): one 10-bit and one
12-bit
• Cross Trigger Unit (CTU) to enable synchronization of
ADC conversions with a timer event from the eMIOS or
from the PIT
• Up to 8 serial peripheral interface (DSPI) modules
256 MAPBGA
(17 mm x 17 mm)
• Up to 10 serial communication interface (LINFlex)
modules
• Up to 6 full CAN (FlexCAN) modules with 64 MBs each
• CAN Sampler to catch ID of CAN message
• 1 inter IC communication interface (I
2
C) module
• Up to 177 (LQFP) or 199 (BGA) configurable general
purpose I/O pins
• System clocks sources
• 4–40 MHz external crystal oscillator
• 16 MHz internal RC oscillator
• FMPLL
Additionally, there are two low power oscillators: 128 kHz
internal RC oscillator, 32 kHz external crystal oscillator
• Real Time Counter (RTC) with clock source from internal
128 kHz or 16 MHz oscillators or external 4–40 MHz
crystal
• Supports autonomous wake-up with 1 ms resolution with
max timeout of 2 seconds
• Optional support from external 32 kHz crystal oscillator,
supporting wake-up with 1 second resolution and max
timeout of 1 hour
• 1 System Timer Module (STM) with four 32-bit compare
channels
• Up to 8 periodic interrupt timers (PIT) with 32-bit counter
resolution
• 1 Real Time Interrupt (RTI) with 32-bit counter resolution
• 1 Safety Enhanced Software Watchdog Timer (SWT) that
supports keyed functionality
• 1 dual-channel FlexRay Controller with 128 message
buffers
• 1 Fast Ethernet Controller (FEC)
• On-chip voltage regulator (VREG)
• Cryptographic Services Engine (CSE)
• Offered in the following standard package types:
• 176-pin LQFP, 24
24 mm, 0.5 mm Lead Pitch
• 208-pin LQFP, 28
28 mm, 0.5 mm Lead Pitch
• 256-ball MAPBGA, 17
17mm, 1.0 mm Lead Pitch
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2010, 2011. All rights reserved.
Preliminary—Subject to Change Without Notice
Table of Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Document Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . .9
3.1 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.2 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.3 Functional ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.1 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . .39
4.2 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.2.1 NVUSRO [PAD3V5V(0)] field description . . . . .40
4.2.2 NVUSRO [PAD3V5V(1)] field description . . . . .40
4.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .40
4.4 Recommended operating conditions . . . . . . . . . . . . . .42
4.5 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .45
4.5.1 Package thermal characteristics . . . . . . . . . . . .45
4.5.2 Power considerations. . . . . . . . . . . . . . . . . . . . .45
4.6 I/O pad electrical characteristics . . . . . . . . . . . . . . . . . .46
4.6.1 I/O pad types . . . . . . . . . . . . . . . . . . . . . . . . . . .46
4.6.2 I/O input DC characteristics . . . . . . . . . . . . . . . .46
4.6.3 I/O output DC characteristics. . . . . . . . . . . . . . .47
4.6.4 Output pin transition times . . . . . . . . . . . . . . . . .50
4.6.5 I/O pad current specification . . . . . . . . . . . . . . .51
4.7 RESET electrical characteristics. . . . . . . . . . . . . . . . . .53
4.8 Power management electrical characteristics. . . . . . . .55
4.8.1 Voltage regulator electrical characteristics . . . .55
4.8.2 VDD_BV options . . . . . . . . . . . . . . . . . . . . . . . .56
4.8.3 Voltage monitor electrical characteristics. . . . . .57
4.9 Low voltage domain power consumption . . . . . . . . . . .58
4.10 Flash memory electrical characteristics . . . . . . . . . . . .60
4.10.1 Program/Erase characteristics. . . . . . . . . . . . . .60
4.10.2 Flash memory power supply DC characteristics62
4.10.3 Flash memory start-up/switch-off timings . . . . .63
4.11 Electromagnetic compatibility (EMC) characteristics . .63
4.11.1 Designing hardened software to avoid noise
problems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.11.2 Electromagnetic interference (EMI) . . . . . . . . . 64
4.11.3 Absolute maximum ratings (electrical sensitivity)64
4.12 Fast external crystal oscillator (4–40 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.13 Slow external crystal oscillator (32 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.14 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . 70
4.15 Fast internal RC oscillator (16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.16 Slow internal RC oscillator (128 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.17 ADC electrical characteristics . . . . . . . . . . . . . . . . . . . 72
4.17.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.18 Fast Ethernet Controller . . . . . . . . . . . . . . . . . . . . . . . 82
4.18.1 MII Receive Signal Timing (RXD[3:0], RX_DV,
RX_ER, and RX_CLK) . . . . . . . . . . . . . . . . . . . 82
4.18.2 MII Transmit Signal Timing (TXD[3:0], TX_EN,
TX_ER, TX_CLK) . . . . . . . . . . . . . . . . . . . . . . . 83
4.18.3 MII Async Inputs Signal Timing (CRS and COL)83
4.18.4 MII Serial Management Channel Timing (MDIO and
MDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.19 On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.19.1 Current consumption . . . . . . . . . . . . . . . . . . . . 86
4.19.2 DSPI characteristics. . . . . . . . . . . . . . . . . . . . . 88
4.19.3 Nexus characteristics . . . . . . . . . . . . . . . . . . . . 96
4.19.4 JTAG characteristics. . . . . . . . . . . . . . . . . . . . . 98
Package characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . 100
5.1.1 176 LQFP package mechanical drawing . . . . 100
5.1.2 208 LQFP package mechanical drawing . . . . 104
5.1.3 256 MAPBGA package mechanical drawing . 108
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
4
5
6
7
MPC5646C Microcontroller Datasheet, Rev. 4
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Introduction
1
1.1
Introduction
Document Overview
This document describes the features of the family and options available within the family members, and highlights important
electrical and physical characteristics of the MPC5646C device. To ensure a complete understanding of the device functionality,
refer also to the MPC5646C Reference Manual.
1.2
Description
The MPC5646C is a new family of next generation microcontrollers built on the Power Architecture embedded category. This
document describes the features of the family and options available within the family members, and highlights important
electrical and physical characteristics of the device.
The MPC5646C family expands the range of the MPC560xB microcontroller family. It provides the scalability needed to
implement platform approaches and delivers the performance required by increasingly sophisticated software architectures. The
advanced and cost-efficient host processor core of the MPC5646C automotive controller family complies with the Power
Architecture embedded category, which is 100 percent user-mode compatible with the original Power Architecture user
instruction set architecture (UISA). It operates at speeds of up to 120 MHz and offers high performance processing optimized
for low power consumption. It also capitalizes on the available development infrastructure of current Power Architecture
devices and is supported with software drivers, operating systems and configuration code to assist with users implementations.
MPC5646C Microcontroller Datasheet, Rev. 4
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
3
Table 1. MPC5646C family comparison
1
Feature
Package
CPU
Execution speed
2
MPC5644B
MPC5644C
256
BGA
MPC5645B
MPC5645C
256
BGA
MPC5646B
MPC5646C
256
BGA
Freescale Semiconductor
MPC5646C Microcontroller Datasheet, Rev. 4
Preliminary—Subject to Change Without Notice
4
176
208
176
208
LQFP LQFP LQFP LQFP
e200z4d
Up to 120 MHz
(e200z4d)
176
208
176
208
LQFP LQFP LQFP LQFP
e200z4d
Up to 120 MHz
(e200z4d)
176
208
176
208
LQFP LQFP LQFP LQFP
e200z4d
Up to 120 MHz
(e200z4d)
e200z4d + e200z0h
Up to 120 MHz
(e200z4d)
Up to 80 MHz
(e200z0h)
3
1.5 MB
e200z4d + e200z0h
Up to 120 MHz
(e200z4d)
Up to 80 MHz
(e200z0h)
3
2 MB
4 x16 KB
e200z4d + e200z0h
Up to 120 MHz
(e200z4d)
Up to 80 MHz
(e200z0h)
3
3 MB
Code flash memory
Data flash memory
SRAM
MPU
eDMA
4
10-bit ADC
dedicated
5,6
shared with
12-bit ADC
7
12-bit ADC
dedicated
8
shared with
10-bit ADC
7
CTU
Total timer I/O
9
eMIOS
SCI (LINFlexD)
SPI (DSPI)
CAN (FlexCAN)
10
FlexRay
STCU
11
Ethernet
I
2
C
No
27 ch
33 ch
128 KB
192 KB
160 KB
16-entry
32 ch
256 KB
192 KB
256 KB
27 ch
33 ch
27 ch
33 ch
27 ch
19 ch
10 ch
33 ch
27 ch
33 ch
27 ch
33 ch
19 ch
64 ch
64 ch, 16-bit
10
8
6
Yes
Introduction
Yes
Yes
No
1
Yes
No
Yes
Table 1. MPC5646C family comparison
1
(continued)
Feature
Package
32 kHz oscillator (SXOSC)
GPIO
12
Debug
147
177
147
177
199
Nexus
3+
147
177
MPC5644B
MPC5644C
256
BGA
MPC5645B
MPC5645C
256
BGA
MPC5646B
MPC5646C
256
BGA
5
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Cryptographic Services
Engine (CSE)
1
2
Introduction
176
208
176
208
LQFP LQFP LQFP LQFP
176
208
176
208
LQFP LQFP LQFP LQFP
Yes
147
177
176
208
176
208
LQFP LQFP LQFP LQFP
199
Nexus
3+
147
177
147
177
199
Nexus
3+
JTAG
JTAG
Optional
JTAG
MPC5646C Microcontroller Datasheet, Rev. 4
Feature set dependent on selected peripheral multiplexing; table shows example.
Based on 125
C
ambient operating temperature and subject to full device characterisation.
3
The e200z0h can run at speeds up to 80 MHz. However, if system frequency is >80 MHz (e.g., e200z4d running at 120 MHz) the e200z0h needs
to run at 1/2 system frequency. There is a configurable e200z0 system clock divider for this purpose.
4
DMAMUX also included that allows for software selection of 32 out of a possible 57 sources.
5
Not shared with 12-bit ADC, but possibly shared with other alternate functions.
6
There are 23 dedicated ANS plus 4 dedicated ANX channels on LQPF176. For higher pin count packages, there are 29 dedicated ANS plus 4
dedicated ANX channels.
7
16x precision channels (ANP) and 3x standard (ANS).
8
Not shared with 10-bit ADC, but possibly shared with other alternate functions.
9
As a minimum, all timer channels can function as PWM or Input Capture and Output Control. Refer to the eMIOS section of the device reference
manual for information on the channel configuration and functions.
10
CAN Sampler also included that allows ID of CAN message to be captured when in low power mode.
11
STCU controls MBIST activation and reporting.
12
Estimated I/O count for proposed packages based on multiplexing with peripherals.
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