4355 is a positive voltage ideal diode-OR controller
that drives two external N-channel MOSFETs. Forming the
diode-OR with N-channel MOSFETs instead of Schottky
diodes reduces power consumption, heat dissipation and
PC board area.
With the LTC4355, power sources can easily be ORed
together to increase total system reliability. The LTC4355
can diode-OR two positive supplies or the return paths of
two negative supplies, such as in a –48V system.
In the forward direction the LTC4355 controls the voltage
drop across the MOSFET to ensure smooth current transfer
from one path to the other without oscillation. If a power
source fails or is shorted, fast turnoff minimizes reverse
current transients.
Power fault detection indicates if the input supplies are
not in regulation, the inline fuses are blown, or the
voltages across the MOSFETs are greater than the fault
threshold.
Replaces Power Schottky Diodes
Controls N-Channel MOSFETs
0.5µs Turn-Off Time Limits Peak Fault Current
Wide Operating Voltage Range: 9V to 80V
Smooth Switchover without Oscillation
No Reverse DC Current
Monitors V
IN
, Fuse, and MOSFET Diode
Available in DFN-14 (4mm
×
3mm) and
SSOP-16 Packages
APPLICATIONS
■
■
■
■
High Availability Systems
AdvancedTCA
®
(ATCA) Systems
+48V and –48V Distributed Power Systems
Telecom Infrastructure
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
+48V Diode-OR
7A
V
IN1
= +48V
7A
V
IN2
= +48V
FDB3632
TO
LOAD
FDB3632
22k
340k
340k
IN1
MON1
SET
MON2
12.7k
GND
4355 TA01
Power Dissipation vs Load Current
6
5
22k
22k
22k
22k
POWER DISSIPATION (W)
DIODE (MBR10100)
4
3
2
1
FET (FDB3632)
0
0
2
4
6
CURRENT (A)
8
10
4355 TA02
GATE1 IN2
GATE2 OUT
VDSFLT
FUSEFLT1
FUSEFLT2
PWRFLT1
PWRFLT2
POWER
SAVED
LTC4355
GND
12.7k
GREEN LEDs
PANASONIC LN1351C
4355f
1
LTC4355
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Supply Voltages
IN1, IN2 ............................................... –0.3V to 100V
OUT ..................................................... –0.3V to 100V
Input Voltages
MON1, MON2, SET .................................. –0.3V to 7V
Output Voltages
GATE1 (Note 3) ................... V
IN1
– 0.2V to V
IN1
+ 13V
GATE2 (Note 3) ................... V
IN2
– 0.2V to V
IN2
+ 13V
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T
⎯
1,
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T2,
⎯
V
⎯
D
⎯
S
⎯
F
⎯
L
⎯
T,
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T
⎯
1,
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T
⎯
2 .............................. –0.3V to 8V
Operating Temperature Range
LTC4355C ................................................ 0°C to 70°C
LTC4355I .............................................–40°C to 85°C
Storage Temperature Range
DFN Package......................................–65°C to 125°C
SO Package........................................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
SO Package....................................................... 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
IN1 1
IN1
GATE1
OUT
GATE2
IN2
VDSFLT
GND
1
2
3
4
5
6
7
15
14 MON1
13 PWRFLT1
12 FUSEFLT1
11 FUSEFLT2
10 PWRFLT2
9 MON2
8 SET
GATE1 2
NC 3
OUT 4
NC 5
GATE2 6
IN2 7
NC 8
TOP VIEW
16 MON1
15 PWRFLT1
14 FUSEFLT1
13 FUSEFLT2
12 PWRFLT2
11 MON2
10 SET
9
GND
DE14 PACKAGE
14-LEAD (4mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 15) PCB GND CONNECTION OPTIONAL
S PACKAGE
16-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 75°C/W
ORDER PART NUMBER
LTC4355CDE
LTC4355IDE
DE PART MARKING*
4355
ORDER PART NUMBER
LTC4355CS
LTC4355IS
S PART MARKING
LTC4355CS
LTC4355IS
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
OUT
I
OUT
I
INx
PARAMETER
Operating Supply Range
Supply Current
INx Pin Input Current
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. 9V < V
OUT
< 80V unless otherwise noted.
CONDITIONS
●
●
MIN
9
TYP
2
MAX
80
3
1.2
UNITS
V
mA
mA
GATE High
●
0.5
0.6
4355f
2
LTC4355
ELECTRICAL CHARACTERISTICS
SYMBOL
ΔV
GATEx
I
GATEx(UP)
I
GATEx(DN)
t
OFF
V
MONx(TH)
V
MONx(HYST)
I
MONx(IN)
V
INx(TH)
V
INx(HYST)
ΔV
SD
ΔV
SD(FLT)
PARAMETER
External N-Channel Gate Drive
(V
GATEx
– V
INx
)
External N-Channel Gate Pull-Up Current
External N-Channel Gate Pulldown in Fault
Condition
Gate Turn-Off Time
MONx Pin Threshold Voltage
MONx Pin Hysteresis Voltage
MONx Pin Input Current
INx Pin Threshold Voltage
INx Pin Hysteresis Voltage
Source-Drain Regulation Voltage
(V
INx
– V
OUT )
Short-Circuit Fault Voltage
(V
INx
– V
OUT
) Rising
V
GATEx
– V
INx
= 2.5V
SET = 0V
SET = 100kΩ
SET = Hi-Z
I
⎯
P
⎯
W
⎯
R
⎯
FL
⎯
T
⎯
x
, I
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T
⎯
x
, I
⎯
V
⎯
D
⎯
S
⎯
F
⎯
L
⎯
T
= 5mA
V
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T
⎯
x
, V
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T
⎯
x
, V
⎯
V
⎯
D
⎯
S
⎯
F
⎯
L
⎯
T
= 5V
V
MONx
= 1.23V
V
INx
Rising
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. 9V < V
OUT
< 80V, unless otherwise noted.
CONDITIONS
V
OUT
= 20V to 80V
V
OUT
= 9V to 20V
Gate Drive On, V
GATE
= V
INx
,
ΔV
SD
= 100mV
Gate Drive Off, V
GATEx
= V
INx
+5V
–
V
INx
– V
OUT
= 55mV |
–
–1V
V
GATEx
– V
INx
< 1V
MIN
●
●
●
●
●
●
●
●
●
●
●
●
●
●
TYP
14
6
–20
2
0.3
MAX
18
18
–26
UNITS
V
V
µA
A
10
4.5
–14
1
0.4
1.245
45
±1
4
150
55
0.3
0.6
1.6
200
±1
5
150
µs
V
mV
µA
V
mV
mV
V
V
V
mV
mV
µA
kΩ
kΩ
MΩ
V
MONx
Rising
1.209
10
3
25
10
0.2
0.4
1.3
1.227
30
0
3.5
75
25
0.25
0.5
1.5
30
100
0
ΔV
SD(FLT)(HYST)
Short-Circuit Fault Hysteresis Voltage
V
⎯
F
⎯
L
⎯
T
I
⎯
F
⎯
L
⎯
T
R
SET(L)
R
SET(M)
R
SET(H)
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T
⎯
x,
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T
⎯
x,
⎯
V
⎯
D
⎯
S
⎯
F
⎯
L
⎯
T Pins
Output Low
⎯
PWRFLTx, FUSEFLTx, VDSFLT Pins
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
Leakage Current
SET Resistance Range for
ΔV
SD(FLT)
= 0.25V
SET Resistance Range for
ΔV
SD(FLT)
= 0.5V
SET Resistance Range for
ΔV
SD(FLT)
= 1.5V
●
●
●
●
●
0
50
1
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
Note 3:
The GATEx pins are internally limited to a minimum of 13V above
INx. Driving these pins beyond the clamp may damage the part.
4355f
3
LTC4355
TYPICAL PERFORMANCE CHARACTERISTICS
I
OUT
vs V
OUT
2.0
V
OUT
= V
IN
1.0
I
IN
vs V
IN
V
IN
= V
OUT
20
I
GATE
vs
Δ
V
SD
V
GATE
= 2.5V
1.5
I
OUT
(mA)
I
IN
(mA)
0.8
I
GATE
(µA)
0
40
V
IN
(V)
4355 G01
4355 G02
0
1.0
0.5
–20
0.5
0.3
–40
0
0
0
20
40
V
OUT
(V)
60
80
20
60
80
–60
–50
0
50
V
SD
(mV)
100
150
4355 G03
Δ
V
GATE
vs I
GATE
15
V
IN
> 18V
0.3
Fault Output Low
vs Load Current
150
Fault Output Low
vs Temperature
I
FLT
= 5mA
125
10
∆V
GATE
(V)
V
FLT
(V)
V
IN
= 12V
V
IN
= 9V
5
0.2
V
FLT
(V)
0.1
75
0
0
5
10
15
I
GATE
(µA)
20
25
4355 G04
100
0
0
5
I
FLT
(mA)
10
15
4355 G05
50
–50
50
0
TEMPERATURE (°C)
100
4355 G06
FET Turn-Off Time
vs GATE Capacitance
500
V
GATE
< V
IN
+ 1V
∆V
SD
= 50mV –1V
500
FET Turn-Off Time
vs Initial Overdrive
V
IN
= 48V
∆V
SD
= V
INITIAL
–1V
2000
FET Turn-Off Time
vs Final Overdrive
V
IN
= 48V
∆V
SD
= 50mV V
FINAL
400
400
1500
t
OFF
(ns)
t
PD
(ns)
t
PD
(ns)
300
300
1000
200
200
100
100
500
0
0
10
20
20
C
GATE
(nF)
40
50
4355 G07
0
0
0.2
0.6
0.4
V
INITIAL
(V)
0.8
1.0
4355 G08
0
–1.0
–0.8
–0.4
–0.6
V
FINAL
(V)
–0.2
0
4355 G09
4355f
4
LTC4355
PIN FUNCTIONS
(DE/S Packages)
EXPOSED PAD (Pin 15, DE Package Only):
Exposed pad
may be left open or connected to GND.
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T
⎯
x (Pins 11,12/13,14):
Fuse Fault Outputs.
Open-drain output that pulls to GND when V
INx
< 3.5V,
indicating that the fuse has blown open. Otherwise, this
output is high-impedance. Connect to GND if unused.
GATEx (Pins 2,4/2,6):
Gate Drive Outputs. The GATE
pins pull high, enhancing the N-channel MOSFET when
the load current creates more than 25mV of voltage drop
across the MOSFET. When the load current is small,
the gates are actively driven to maintain 25mV across
the MOSFET. If the reverse current develops more than
–25mV of voltage drop across a MOSFET, a fast pulldown
circuit quickly connects the GATE pin to the IN pin, turning
off the MOSFET. Limit the capacitance between the GATE
and IN pins to less than 0.1µF.
GND (7/9):
Device Ground.
INx (Pins 1,5/1,7):
Input Voltages and GATE Fast Pulldown
Returns. The IN pins are the anodes of the ideal diodes
and connect to the sources of the N-channel MOSFETs.
The voltages sensed at these pins are used to control the
source-drain voltages across the MOSFETs and are used
by the fault detection circuits that drive the
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T,
⎯
F
⎯
U
⎯
S
⎯
E
⎯
F
⎯
L
⎯
T, and
⎯
V
⎯
D
⎯
S
⎯
F
⎯
L
⎯
T pins. The GATE fast pulldown cur-
rent is returned through the IN pins. Connect these pins
as close to the MOSFET sources as possible. Connect to
OUT if unused.
MONx (Pins 9,14/11,16):
Input Supply Monitors. These
pins are used to sense the input supply voltages. Connect
these pins to external resistive dividers between the input
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
supplies and GND. If V
MONx
falls below 1.23V, the PWRFLTx
pin pulls to GND. Connect to GND if unused.
OUT (Pin 3/4):
Drain Voltage Sense and Positive Sup-
ply Input. OUT is the diode-OR output of IN1 and IN2. It
connects to the common drain connection of the N-chan-
nel MOSFETs. The voltage sensed at this pin is used to
control the source-drain voltages across the MOSFETs
and is used by the fault detection circuits that drive the
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T and
⎯
V
⎯
D
⎯
S
⎯
F
⎯
L
⎯
T pins. The LTC4355 is powered from
the OUT pin.
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T
⎯
x (Pins 10,13/12,15):
Power Fault Outputs.
Open-drain output that pulls to GND when V
MONx
falls
below 1.23V or the forward voltage across the MOSFET
exceeds
ΔV
SD(FLT)
. When V
MONx
is above 1.23V and
the forward voltage across the MOSFET is less than
ΔV
SD(FLT)
,
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T
⎯
x is high-impedance. Connect to GND
if unused.
SET (Pin 8/10):
ΔV
SD(FLT)
Threshold Configuration Input.
Tying SET to GND, to a 100kΩ resistor connected to GND,
or leaving SET open configures the
ΔV
SD(FLT)
forward volt-
age fault threshold to 250mV, 500mV, or 1.5V respectively.
When the voltage across a MOSFET exceeds
ΔV
SD(FLT)
,
the
⎯
V
⎯
S
⎯
D
⎯
F
⎯
L
⎯
T pin and at least one of the
⎯
P
⎯
W
⎯
R
⎯
F
⎯
L
⎯
T pins pull
to GND.
⎯
VD
⎯
S
⎯
F
⎯
L
⎯
T (Pin 6, DE Package Only):
MOSFET Fault Output.
⎯
Open-drain output that pulls to GND when the forward volt-
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