CYIFS731
Low EMI Spread Spectrum Clock
Low EMI Spectrum Spread Clock
Features
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Functional Description
The CYIFS731 is a Frequency Spreading EMI Attenuator
designed for the purpose of reducing Electro Magnetic
Interference (EMI) found in today’s high speed digital systems.
The CYIFS731 uses a proprietary technique to modulate the
output clock, Modout. By modulating the frequency of the digital
clock, measured EMI at the fundamental and harmonic
frequencies is greatly reduced. This reduction in radiated energy
can significantly reduce the cost of complying with regulatory
requirements without degrading digital waveforms.
The CYIFS731 is a very simple device to use and provides 1X
and 2X frequency modulated outputs of the input reference
frequency. By programming the two range select lines, RS0 and
RS1, the CYIFS731 can operate over a very wide range of input
frequencies. By utilizing Bi-Directional Buffer design, the pin
count of the CYIFS731 is kept to a minimum. Bi-Directional
Buffers is a method of providing an input control signal and an
output driver circuit on the same pin. Bi-Directional Buffers is
discussed further on page 6. The CYIFS731 has a simple
frequency selection table that allows it to operate from 4 MHz to
68 MHz in four separate ranges. The bandwidth of the frequency
spread at Modout is determined by the values of the loop filter
components. The modulation rate is determined by the input
frequency and the input frequency range selected. The
bandwidth of the CYIFS731 can be programmed from as little as
0.5% up to as much as 4.0% by selecting the proper loop filter.
It is for this reason that the CYIFS731 uses an external loop filter
(LF), in contrast to an internal loop filter type device which would
severely limit the use of a wide range of bandwidths.
For a complete list of related documentation, click
here.
Reduces Systemic EMI.
Modulates external clocks including crystals, crystal oscillators
and ceramic resonators.
1X and 2X modulated frequency outputs.
Modulation programmable with simple external loop filter (LF).
4 to 68 MHz operating frequency range.
Digitally controlled modulation.
TTL/CMOS compatible outputs.
Center Spread Modulation.
Low short term jitter.
Bi-Directional buffers for reduced pin count.
3–5 Volt power supply.
Low Power Dissipation;
❐
3.3 VDC = 30 mW - typical
❐
5.0 VDC = 100 mW - typical
Available in 8 pin SOIC package.
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Cypress Semiconductor Corporation
Document Number: 001-73426 Rev. *D
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised December 16, 2014
Not Recommended for New Designs
CYIFS731
Block Diagram
LF
RS0
Modulation
Control Logic
250k
Divide
1
2
by R
Bi-Directional
Buffer/Divider
7
RS1
Phase
Detector
VCO
4
Xin
Xout
Fout/RS0
Divide
by N
Bi-Directional
Buffer/Divider
6
FoutX2/RS1
Power On, Reset
Logic
8
VDD
5
3
VSS
Document Number: 001-73426 Rev. *D
Page 2 of 20
Not Recommended for New Designs
CYIFS731
Contents
Pin Configurations ........................................................... 4
Pin Definitions .................................................................. 4
Frequency Range Selection Table .................................. 5
Functional Overview ........................................................ 6
Bi-directional Buffers ................................................... 6
Loop Filters .................................................................. 6
SSCG Modulation Profile ............................................ 9
Theory of Operation ....................................................... 10
EMI ............................................................................ 10
SSCG ........................................................................ 10
Modulation Rate ........................................................ 12
Application Notes and Schematics ............................... 13
Calculating dB Reduction .......................................... 13
Absolute Maximum Ratings .......................................... 14
Electrical Characteristics ............................................... 14
Timing Characteristics ................................................... 15
Ordering Information ...................................................... 16
Ordering Code Definitions ......................................... 16
Package Diagram ............................................................ 17
Acronyms ........................................................................ 18
Document Conventions ................................................. 18
Units of Measure ....................................................... 18
Document History Page ................................................. 19
Sales, Solutions, and Legal Information ...................... 20
Worldwide Sales and Design Support ....................... 20
Products .................................................................... 20
PSoC® Solutions ...................................................... 20
Cypress Developer Community ................................. 20
Technical Support ..................................................... 20
Document Number: 001-73426 Rev. *D
Page 3 of 20
Not Recommended for New Designs
CYIFS731
Pin Configurations
Figure 1. CYIFS731, SOIC Package Pin Assignment
CYIFS731
Pin Definitions
Pin No.
1, 2
Pin Name
X
IN
, X
OUT
I/O
I/O
Type
Description
CMOS/TTL Pins form an on-chip reference oscillator when connected to terminals of an
external parallel resonant crystal. X
IN
may be connected to TTL/CMOS
external clock source. If X
IN
is connected to an external clock other than a
crystal, leave X
OUT
(pin 2) unconnected.
Analog
Single ended tri-state output of the phase detector. A two pole passive loop
filter is connected to LF. See
Table 1 on page 7
and
Table 2 on page 8
for
proper values.
Circuit Ground.
4
LF
O
3, 5
6
V
SS
FoutX2/RS1
–
I/O
Ground
CMOS/TTL Bi-Directional pin used for range selection input and FoutX2 driver output.
During power up, RS1 serves as an input control line for selecting the proper
frequency operating range. After RS1 is latched into an internal register, this
pin becomes an output for the modulated FoutX2 driver. Refer to
Bi-directional Buffers on page 6
for more information. The center frequency
of FoutX2 is 2 times the reference frequency at X
IN
. FoutX2/RS1 has an
internal 250 k pull-up resistor to V
DD
.
CMOS/TTL Bi-Directional pin used for range selection input and Fout driver output.
During power up, RS0 serves as an input control line for selecting the proper
frequency operating range. After power has reached V
DD
/3, RS0 is latched
into a register and this pin becomes an output pin for the Fout driver. Fout
is a modulated output clock of the reference frequency, X
IN
, being the center
frequency and the modulation bandwidth and rate determined by the applied
loop filter. Refer to
Table 1 on page 7
and
Table 2 on page 8
respectively.
Fout/RS0 has internal 250k ohm pull-up resistor to V
DD
.
Power
Positive Circuit Power Supply.
7
Fout/RS0
I/O
8
V
DD
–
Document Number: 001-73426 Rev. *D
Page 4 of 20
Not Recommended for New Designs
CYIFS731
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields; however,
precautions should be taken to avoid application of any voltage
higher than the absolute maximum rated voltages to this circuit.
For proper operation, V
IN
and V
OUT
should be constrained to the
range, V
SS
< (V
IN
or V
OUT
) < V
DD
. All digital inputs are tied high
or low internally. Refers to electrical specifications for operating
supply range.
Frequency Range Selection Table
X
IN
Range
4–8 MHz
8–16 MHz
16–40 MHz
40–68 MHz
RS1
0
0
1
1
RS0
0
1
0
1
Figure 2. Frequency vs. Idd
Document Number: 001-73426 Rev. *D
Page 5 of 20
Not Recommended for New Designs
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