CMX644A
V.22 and Bell 212A
Modem
D/644A/6 June 2000
Provisional Issue
Features
•
•
•
•
•
•
V.22/Bell 212A Compatible Modem
Integrated DTMF Encoder
Call Progress/Accurate Answer Tone Detection
Line Reversal and Ringing Detector
Low Power Operation (2.7V)
Fully Integrated UART Functions
Applications
•
•
•
•
•
•
Telephone Telemetry Systems
Remote Utility Meter Reading
Security Systems/Cash Terminals
Industrial Control Systems
Pay-Phones
Cable TV Set-Top Boxes
1.1
Brief Description
The CMX644A V.22 modem is intended for use in any telephone based information and telemetry system with
low power requirements. Using V.22 signalling, fast call set up times and robust error resistant transmission
can be implemented by efficient low power circuits. The circuit can operate at 1200b/s full duplex over 2-or 4-
wire circuits. Control of the device is via a simple high speed serial bus and data may be optionally formatted
by the on-chip UART. This allows easy interfacing to a host µController. The data transmitted and received
by the modem is also transferred over the same high speed serial bus. In addition to V.22, support is included
to meet the Bell 212A standard. The integrated DTMF encoder can be used as part of the dial out function.
All 16 DTMF combinations are available along with a single tone ‘melody’ mode.
The answer tone generator/detector and call progress tone detectors included on the CMX644A make the set-
up of a telephone call a simple matter for the host µController.
In many data collection and telemetry systems low power consumption is important. The CMX644A features a
‘Zero Power’ standby mode. Whilst in standby, the device can still detect a ringing voltage or line voltage
reversal. The CMX644A can operate on a supply voltage between 3.0V and 5.5V across the full temperature
range of -40°C to +85°C. A low impedance pull down output is provided for a hook relay. The CMX644A is
pin compatible with the CMX624 V23/Bell 202 modem also from CML.
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2000
Consumer Microcircuits Limited
V22 and Bell 212A Modem
CMX644A
CONTENTS
Section
1.1
1.2
1.3
1.4
1.5
Page
Brief Description ..................................................................................1
Block Diagram......................................................................................3
Signal List ............................................................................................4
External Components ..........................................................................6
General Description.............................................................................7
1.5.1 ‘C-BUS’ Interface .....................................................................7
1.5.2
UART .......................................................................................8
1.5.3 Software Description.............................................................10
Application Notes ..............................................................................21
1.6.1 Line Interface.........................................................................21
1.6.2 Ring Detector Interface .........................................................23
1.6.3 Software Protocol for Transmitting PSK Data Bytes...........24
1.6.4 Software Protocol for Receiving PSK Data Bytes ...............25
1.6.5 Handling Underflow and Overflow Conditions....................25
Performance Specification ................................................................27
1.7.1 Electrical Performance..........................................................27
1.7.2 Packaging ..............................................................................32
1.6
1.7
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CMX644A
1.2
Block Diagram
Figure 1 Block Diagram
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CMX644A
1.3
Signal List
CMX644A
D2/D5/P4
Pin No.
1
2
Signal
Name
XTALN
XTAL/CLOCK
Type
O/P
I/P
The inverted output of the on-chip oscillator.
The input to the on-chip oscillator, for external
Xtal circuit or clock.
The ‘C-BUS’ serial clock input. This clock,
produced by the
µController,
is used for the
transfer timing of commands to and from the
device.
The ‘C-BUS’ serial data input from the
µController.
Data is loaded into this device in 8-
bit bytes, MSB (B7) first, and LSB (B0) last,
synchronised to the SERIAL CLOCK.
The ‘C-BUS’ serial data output to the
µController.
The transmission of REPLY DATA
bytes is synchronised to the SERIAL CLOCK
under control of the CSN input. This 3-state
output is held at high impedance when not
sending data to the
µController.
The ‘C-BUS’ data loading control function: this
input is provided by the
µController.
Data
transfer sequences are initiated, completed or
aborted by the CSN signal.
This output indicates an interrupt condition to the
µController
by going to a logic ‘0’. This is a
‘wire-ORable’ output, enabling the connection of
up to 8 peripherals to 1 interrupt port on the
µController.
This pin has a low impedance
pulldown to logic ‘0’ when active and a high
impedance when inactive. An external pull-up
resistor is required.
The output of the transmit gain control.
The output of the line driver amplifier.
The inverting input to the line driver amplifier.
The inverted output of the line driving amplifier.
Pins TXO and TXON provide symmetrical
outputs for use with a balanced load to give
sufficient Tx line signal levels even at low VDD.
Description
3
SERIAL CLOCK
I/P
4
COMMAND DATA
I/P
5
REPLY DATA
T/S
6
CSN
I/P
7
IRQN
O/P
8
9
10
11
TOP
TXO
TXN
TXON
O/P
O/P
I/P
O/P
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CMX644A
1.3
Signal List
(Continued)
CMX644A
D2/D5/P4
Pin No.
12
13
Signal
Name
VSS
VBIAS
Type
P
OWER
O/P
The negative supply rail (ground).
A bias line for the internally circuitry, held at ½
VDD. This pin must be decoupled by a
capacitor mounted close to the device pins.
An open-drain output for controlling a relay.
The non-inverting input of the receive op-amp.
The inverting input of the receive op-amp.
The output of the receive op-amp.
Open-drain output and Schmitt trigger input
forming part of the Ring or Line Polarity
Reversal detector. An external resistor to VDD
and a capacitor to VSS should be connected to
RT to filter and extend the RD input signal.
Input to the Ring or Line Polarity Reversal
Detector.
No connections should be made to these pins.
Description
14
15
16
17
18
RLYDRV
RXP
RXN
RXO
RT
O/P
I/P
I/P
O/P
BI
19
RD
I/P
20, 21,
22
23
-
N/C
ATODCAP
O/P
The reference voltage for the internal A to D of
the receiver. This pin must be decoupled by a
capacitor mounted close to the device pins.
The positive supply rail. Levels and thresholds
within the device are proportional to this
voltage. Should be decoupled to VSS by a
capacitor mounted close to the device pins.
24
VDD
P
OWER
Notes:
I/P
O/P
N/C
B/I
T/S
=
=
=
=
=
Input
Output
No (external) Connections
Bidirectional
Tristate
This device is capable of detecting and decoding small amplitude signals. It is recommended that the printed
circuit board is laid out with a ground plane in the CMX644A area to provide a low impedance connection
between the VSS pin and the VDD and VBIAS decoupling capacitors. The receive path should be protected
as much as possible from extraneous signals.
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2000
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