HM5164805 Series
HM5165805 Series
64 M EDO DRAM (8-Mword
×
8-bit)
8 k Refresh/4 k Refresh
ADE-203-808B (Z)
Rev. 1.0
Feb. 27, 1998
Description
The Hitachi HM5164805 Series, HM5165805 Series are 64M-bit dynamic RAMs organized as 8,388,608-
word
×
8-bit. They have realized high performance and low power by employing CMOS process
technology. HM5164805 Series, HM5165805 Series offer Extended Data Out (EDO) Page Mode as a
high speed access mode. They have the package variation of standard 32-pin plastic SOJ and standard
32-pin plastic TSOPII.
Features
•
Single 3.3 V supply: 3.3 V ± 0.3 V
•
Access time: 50 ns/60 ns (max)
•
Power dissipation
Active: 414 mW/378 mW (max) (HM5164805 Series)
: 486 mW/414 mW (max) (HM5165805 Series)
Standby : 1.8 mW (max) (CMOS interface)
: 0.54 mW (max) (L-version)
•
EDO page mode capability
•
Refresh cycles
#$
-only refresh
8192 cycles
/64 ms (HM5164805)
/128 ms (HM5164805L) (L-version)
4096 cycles
/64 ms (HM5165805)
/128 ms (HM5165805L) (L-version)
HM5164805 Series, HM5165805 Series
CBR/Hidden refresh
4096 cycles
/64 ms (HM5164805, HM5165805)
/128 ms (HM5164805L, HM5165805L) (L-version)
•
4 variations of refresh
#$
-only refresh
$
-before-
#$
refresh
Hidden refresh
Self refresh (L-version)
•
Battery backup operation (L-version)
Ordering Information
Type No.
HM5164805J-5
HM5164805J-6
HM5164805LJ-5
HM5164805LJ-6
HM5165805J-5
HM5165805J-6
HM5165805LJ-5
HM5165805LJ-6
HM5164805TT-5
HM5164805TT-6
HM5164805LTT-5
HM5164805LTT-6
HM5165805TT-5
HM5165805TT-6
HM5165805LTT-5
HM5165805LTT-6
Access time
50 ns
60 ns
50 ns
60 ns
50 ns
60 ns
50 ns
60 ns
50 ns
60 ns
50 ns
60 ns
50 ns
60 ns
50 ns
60 ns
400-mil 32-pin plastic TSOP II
(TTP-32DC)
Package
400-mil 32-pin plastic SOJ
(CP-32DC)
2