VS-ST700CL Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 910 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case TO-200AC (B-PUK)
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
TYPICAL APPLICATIONS
TO-200AC (B-PUK)
• DC motor controls
• Controlled DC power supplies
• AC controllers
PRODUCT SUMMARY
Package
Diode variation
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
TO-200AC (B-PUK)
Single SCR
910 A
1200 V, 1600 V, 1800 V, 2000 V
1.80 V
100 mA
-40 °C to 125 °C
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
V
DRM
/V
RRM
t
q
T
J
Typical
T
hs
T
hs
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
910
55
1857
25
15 700
16 400
1232
1125
1200 to 2000
150
-40 to 125
UNITS
A
°C
A
°C
A
kA
2
s
V
μs
°C
VOLTAGE RATINGS
TYPE
NUMBER
VOLTAGE
CODE
12
VS-ST700CL
16
18
20
V
RSM
, MAXIMUM
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE
V
V
1200
1600
1800
2000
1300
1700
1900
2100
80
I
DRM
/I
RRM
MAXIMUM AT
T
J
= T
J
MAXIMUM
mA
Revision: 19-Dec-13
Document Number: 94413
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST700CL Series
www.vishay.com
Vishay Semiconductors
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
VALUES
910 (355)
55 (85)
1857
15 700
16 400
13 200
Sinusoidal half wave,
initial T
J
= T
J
maximum
13 800
1232
1125
871
795
12 321
1.00
1.13
0.40
0.35
1.80
600
1000
kA
2
√s
V
mΩ
V
mA
kA
2
s
A
UNITS
A
°C
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
Maximum I
2
t for fusing
I
2
t
Maximum I
2
√t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
I
2
√t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 2000 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
SWITCHING
PARAMETER
Maximum non-repetitive rate of rise
of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
Gate drive 20 V, 20
Ω,
t
r
≤
1 μs
T
J
= T
J
maximum, anode voltage
≤
80 % V
DRM
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
I
TM
= 750 A, T
J
= T
J
maximum, dI/dt = 60 A/μs,
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
Ω,
t
p
= 500 μs
VALUES
1000
1.0
μs
150
UNITS
A/μs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
VALUES
500
50
UNITS
V/μs
mA
Revision: 19-Dec-13
Document Number: 94413
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST700CL Series
www.vishay.com
Vishay Semiconductors
VALUES
Typ.
Max.
10.0
2.0
3.0
20
5.0
200
Maximum required gate
trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
100
50
2.5
1.8
1.1
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
DRM
anode to
cathode applied
10
-
200
-
-
3.0
-
mA
V
mA
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
I
GT
TEST CONDITIONS
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= -40 °C
DC gate current required to trigger
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
DC gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
DC gate current not to trigger
I
GD
T
J
= T
J
maximum
DC gate voltage not to trigger
V
GD
UNITS
W
A
V
0.25
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating junction temperature range
Maximum storage temperature range
Maximum thermal resistance, junction to heatsink
SYMBOL
T
J
T
Stg
R
thJ-hs
R
thC-hs
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.073
0.031
0.011
0.006
14 700
(1500)
255
See dimensions - link at the end of datasheet
N
(kg)
g
K/W
UNITS
°C
Maximum thermal resistance, case to heatsink
Mounting force, ± 10 %
Approximate weight
Case style
TO-200AC (B-PUK)
ΔR
thJ-hs
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
SINGLE SIDE DOUBLE SIDE
0.009
0.011
0.014
0.020
0.036
0.009
0.011
0.014
0.020
0.036
RECTANGULAR CONDUCTION
SINGLE SIDE
0.006
0.011
0.015
0.021
0.036
DOUBLE SIDE
0.006
0.011
0.015
0.021
0.036
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJ-hs
when devices operate at different conduction angles than DC
Revision: 19-Dec-13
Document Number: 94413
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST700CL Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Heatsink T
emperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
400
800
1200
30°
60°
90°
120°
180°
DC
1600
2000
Conduction Period
Maximum Allowable Heatsink T
emperature (°C)
130
120
110
100
90
S 700C..L S
T
eries
(S
ingle S Cooled)
ide
R
thJ-hs
(DC) = 0.073 K/ W
S 700C..L S
T
eries
(Double S Cooled)
ide
R
thJ-hs
(DC) = 0.031 K/ W
Conduction Angle
80
70
60
50
40
0
100
200
300
400
500
600
700
Average On-s
tate Current (A)
30°
60°
90°
120°
180°
Average On-s
tate Current (A)
Fig. 1 - Current Ratings Characteristics
Maximum Allowable Heatsink T
emperature (°C)
Fig. 4 - Current Ratings Characteristics
Maximum Average On-state Power Loss (W)
130
120
110
100
90
80
70
60
50
40
30
20
0
200
30°
S 700C..L S
T
eries
(S
ingle S Cooled )
ide
R
thJ-hs
(DC) = 0.073 K/ W
2800
2400
2000
1600
1200
800
400
0
0
200
400
600
800
1000 1200
Average On-state Current (A)
Conduction Angle
180°
120°
90°
60°
30°
RMSLimit
Conduction Period
60°
90°
120°
180°
DC
800
1000
S 700C..L S
T
eries
T = 125°C
J
400
600
Average On-state Current (A)
Fig. 2 - Current Ratings Characteristics
Maximum Allowable Heatsink T
emperature (°C)
Fig. 5 - On-State Power Loss Characteristics
Maximum Average On-s
tate Power Los (W)
s
130
120
110
100
90
80
70
60
50
40
30
20
0
400
30°
60°
3500
3000
2500
2000
RMSLimit
1500
Conduction Period
S 700C..L S
T
eries
(Double S Cooled)
ide
R
thJ-hs
(DC) = 0.031 K/ W
DC
180°
120°
90°
60°
30°
Conduction Period
90°
120°
180°
DC
800
1200
1600
2000
1000
500
0
0
400
800
1200
1600
2000
Average On-state Current (A)
S 700C..L S
T
eries
T = 125°C
J
Average On-s
tate Current (A)
Fig. 3 - Current Ratings Characteristics
Fig. 6 - On-State Power Loss Characteristics
Revision: 19-Dec-13
Document Number: 94413
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST700CL Series
www.vishay.com
Vishay Semiconductors
Peak Half S Wave On-state Current (A)
ine
16000
15000
Peak Half S Wave On-state Current (A)
ine
14000
13000
12000
11000
10000
9000
8000
7000
6000
1
At Any Rated Load Condition And With
Rated V
RRM
Applied Following S
urge.
Initial T = 125°C
J
@60 Hz 0.0083 s
@50 Hz 0.0100 s
Maximum Non Repetitive S
urge Current
Versus Pulse T
rain Duration. Control
Of Conduc tion May Not Be Maintained.
14000
Initial T = 125°C
J
No Voltage Reapplied
13000
Rated V
RRM
Reapplied
12000
11000
10000
9000
8000
7000
S 700C..L S
T
eries
S 700C..L S
T
eries
10
100
6000
0.01
0.1
Pulse T
rain Duration (s)
1
Numb er Of Eq ual Amplitud e Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
Instantaneous On-state Current (A)
T = 25°C
J
T = 125°C
J
1000
S 700C..L S
T
eries
100
0.5
1
1.5
2
2.5
3
3.5
4
Instantaneous On-state Voltage (V)
Fig. 9 - On-State Voltage Drop Characteristics
T
rans
ient T
hermal Impedance Z
thJ-hs
(K/ W)
0.1
S 700C..L S
T
eries
0.01
S
teady S te Value
ta
R
thJ-hs
= 0.073 K/ W
(S
ingle S
ide Cooled)
R
thJ-hs
= 0.031 K/ W
(Double S
ide Cooled)
(DC Operation)
0.001
0.001
0.01
0.1
S
quare Wave Puls Duration (s)
e
1
10
Fig. 10 - Thermal Impedance Z
thJ-hs
Characteristics
Revision: 19-Dec-13
Document Number: 94413
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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