PD - 96159
IRLML6302GPbF
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Generation V Technology
Ultra Low On-Resistance
P-Channel MOSFET
SOT-23 Footprint
Low Profile (<1.1mm)
Available in Tape and Reel
Fast Switching
Lead-Free
Halogen-Free
HEXFET
®
Power MOSFET
*
'
6
V
DSS
= -20V
R
DS(on)
= 0.60Ω
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
A customized leadframe has been incorporated into the
standard SOT-23 package to produce a HEXFET Power
MOSFET with the industry's smallest footprint. This
package, dubbed the Micro3, is ideal for applications
where printed circuit board space is at a premium. The
low profile (<1.1mm) of the Micro3 allows it to fit easily into
extremely thin application environments such as portable
electronics and PCMCIA cards.
Micro3
TM
Absolute Maximum Ratings
Parameter
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
V
GS
dv/dt
T
J,
T
STG
Continuous Drain Current, V
GS
@ -4.5V
Continuous Drain Current, V
GS
@ -4.5V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Max.
-0.78
-0.62
-4.9
540
4.3
± 12
-5.0
-55 to + 150
Units
A
mW
mW/°C
V
V/ns
°C
Thermal Resistance
R
θJA
Maximum Junction-to-Ambient
Parameter
Typ.
Max.
230
Units
°C/W
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1
07/23/08
IRLML6302GPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(ON)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
-20
-0.70
0.56
Typ.
-4.9
2.4
0.56
1.0
13
18
22
22
97
53
28
Max. Units
Conditions
V
V
GS
= 0V, I
D
= -250µA
mV/°C Reference to 25°C, I
D
= -1mA
0.60
V
GS
= -4.5V, I
D
= -0.61A
Ω
0.90
V
GS
= -2.7V, I
D
= -0.31A
-1.5
V
V
DS
= V
GS
, I
D
= -250µA
S
V
DS
= -10V, I
D
= -0.31A
-1.0
V
DS
= -16V, V
GS
= 0V
µA
-25
V
DS
= -16V, V
GS
= 0V, T
J
= 125°C
-100
V
GS
= -12V
nA
100
V
GS
= 12V
3.6
I
D
= -0.61A
0.84
nC V
DS
= -16V
1.5
V
GS
= -4.5V, See Fig. 6 and 9
V
DD
= -10V
I
D
= -0.61A
ns
R
G
= 6.2Ω
R
D
= 16Ω, See Fig. 10
V
GS
= 0V
pF
V
DS
= -15V
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max. Units
–––
–––
–––
-0.54
–––
35
26
-4.9
-1.2
53
39
V
ns
nC
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= -0.61A, V
GS
= 0V
T
J
= 25°C, I
F
= -0.61A
di/dt = -100A/µs
D
G
S
Repetitive rating; pulse width
T
J
≤
150°C
I
SD
≤
-0.61A, di/dt
≤
76A/µs, V
DD
≤V
(BR)DSS
,
limited by max. junction temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
Surface mounted on FR-4 board, t
≤
5sec.
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2
IRLML6302GPbF
10
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
TOP
10
-I D , Drain-to-Source Current (A)
-ID , Drain-to-Source Current (A)
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
TOP
1
1
0.1
0.1
-1.5V
20µs PULSE WIDTH
T
J
= 150°C
0.1
1
10
0.01
0.1
-1.5V
1
20µs PULSE WIDTH
T
J
= 25°C
A
10
0.01
A
-VDS , Drain-to-Source Voltage (V)
-V , Drain-to-Source Voltage (V)
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
10
2.0
-I
D
, Drain-to-Source Current (A)
T
J
= 25°C
T
J
= 150°C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= -0.61A
1.5
1
1.0
0.1
0.5
0.01
1.5
2.0
2.5
3.0
V
DS
= -10V
20µs PULSE WIDTH
3.5
4.0
4.5
A
0.0
-60
-40
-20
0
20
40
60
80
V
GS
= -4.5V
100 120 140 160
A
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRLML6302GPbF
180
160
140
-V
GS
, Gate-to-Source Voltage (V)
C
iss
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
10
I
D
= -0.61A
V
DS
= -16V
8
C, Capacitance (pF)
120
100
80
60
40
20
0
1
C
oss
6
C
rss
4
2
10
100
A
0
0.0
FOR TEST CIRCUIT
SEE FIGURE 9
1.0
2.0
3.0
4.0
A
-V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
10
10
-I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
-I
D
, Drain Current (A)
1
100µs
T
J
= 150°C
T
J
= 25°C
0.1
1
1ms
10ms
0.01
0.4
0.6
0.8
1.0
V
GS
= 0V
1.2
A
1.4
0.1
1
T
A
= 25°C
T
J
= 150°C
Single Pulse
10
100
A
-V
SD
, Source-to-Drain Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
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4
IRLML6302GPbF
Q
G
V
DS
V
GS
R
G
R
D
-4.5V
V
G
-4.5V
Charge
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 9a.
Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
Fig 10a.
Switching Time Test Circuit
V
DS
50KΩ
12V
.2µF
.3µF
90%
V
GS
-3mA
I
G
I
D
Current Sampling Resistors
Fig 9b.
Gate Charge Test Circuit
1000
Thermal Response (Z
thJA
)
100
D = 0.50
0.20
0.10
10
0.05
0.02
0.01
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJA
+ T
A
0.0001
0.001
0.01
0.1
1
10
100
1
0.1
0.00001
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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+
D.U.T.
V
DS
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
t
1
, Rectangular Pulse Duration (sec)
+
-
Q
GS
Q
GD
D.U.T.
V
DD
-
5
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