PRELIMINARY
CY25001
16-MHz Spread Spectrum Clock Generator
Features
• Integrated phase-locked loop (PLL)
• Low-jitter, high-accuracy outputs
• Spread Spectrum
• 3.3V operation
Part Number
CY25001
Output
1
Input Frequency
16.00 MHz
Benefits
High-performance PLL tailored for multimedia applications
Meets critical timing requirements in complex system designs
Spread Spectrum outputs for EMI reduction
Enables application compatibility
Output Frequency
16.00 MHz
Logic Block Diagram
XIN
OSC
XOUT
Q
Φ
VCO
P
SPREAD
SPECTRUM
OUTPUT
DIVIDERS
CLK1
PLL
SSON
VDD
VSS
Pin Configurations
CY25001
8-pin SOIC
XIN
VDD
SSON
VSS
1
2
3
4
8
7
6
5
XOUT
VSS
CLK1
VDD
Part #
CY25001SC-1
CY25001SC-2
CY25001SC-3
Center Spread Percentage
± 0.225%
± 0.15%
± 0.19%
Cypress Semiconductor Corporation
Document #: 38-07382 Rev. **
•
3901 North First Street
•
San Jose
•
CA 95134
• 408-943-2600
Revised April 3, 2002
PRELIMINARY
Summary
Pin Name
XIN
VDD
SSON
VSS
VDD
CLK1
VSS
XOUT
[1]
Pin Number
1
2
3
4
5
6
7
8
Pin Description
Reference Crystal Input
Voltage Supply
CY25001
Spread Spectrum Control for CLK1, 0 = SS off, 1 = SS on. Internal pull-up resistor.
Ground
Voltage Supply
16-MHz Clock Output with Spread Spectrum
Ground
Reference Crystal Output
Absolute Maximum Conditions
Parameter
V
DD
T
S
T
J
Description
Supply Voltage
Storage Temperature
[2]
Junction Temperature
Digital Inputs
Digital Outputs referred to V
DD
Electrostatic Discharge
V
SS
– 0.3
V
SS
– 0.3
2
Min.
–0.5
–65
Max.
7.0
125
125
V
DD
+ 0.3
V
DD
+ 0.3
Unit
V
°C
°C
V
V
kV
Recommended Operating Conditions
Parameter
V
DD
T
A
C
LOAD
f
REF
Description
Operating Voltage
Ambient Temperature
Max. Load Capacitance
Reference Frequency
16
Min.
3.135
0
Typ.
3.3
Max.
3.465
70
15
Unit
V
°C
pF
MHz
DC Electrical Characteristics
Parameter
I
OH
I
OL
I
IH
I
IL
V
IH
V
IL
C
IN
I
DD
R
UP
Note:
Description
Output High Current
Output Low Current
Input High Current
Input Low Current
Input High Voltage
Input Low Voltage
Input Capacitance
Supply Current
Pull-up resistor on input pin
Conditions
V
OH
= V
DD
– 0.5, V
DD
= 3.3 V
V
OL
= 0.5, V
DD
= 3.3 V
V
IH
= V
DD
V
IL
= 0V
CMOS levels, 70% of V
DD
CMOS levels, 30% of V
DD
Sum of Core and Output Current
Min.
12
12
Typ.
24
24
5
Max.
Unit
mA
mA
µA
50
0.7
0.3
7
35
80
100
150
µA
V
DD
V
DD
pF
mA
kΩ
1. Float X
OUT
if X
IN
is externally driven.
2. Rated for 10 years.
Document #: 38-07382 Rev. **
Page 2 of 5
PRELIMINARY
AC Electrical Characteristics
(V
DD
= 3.3V)
Parameter
[3]
DC
t
3
t
4
t
9
t
10
Description
Output Duty Cycle
Rising Edge Slew Rate
Falling Edge Slew Rate
Clock Jitter
PLL Lock Time
Conditions
Duty Cycle is defined in Figure 1, 50% of V
DD
Output Clock Rise Time, 20%–80% of V
DD
Output Clock Fall Time, 80%–20% of V
DD
Peak to Peak Period Jitter with SSON = 0
Min.
45
0.8
0.8
Typ.
50
1.4
1.4
50
CY25001
Max.
55
2
2
100
3
Unit
%
V/ns
V/ns
ps
ms
Test Circuit
V
DD
0.1
µ
F
OUTPUTS
CLK1
C
LOAD
GND
Ordering Information
Ordering Code
CY25001SC-1
CY25001SC-2
CY25001SC-3
t1
t2
Package Name
S8
S8
S8
Package Type
8-Pin SOIC
8-Pin SOIC
8-Pin SOIC
Operating Range
Commercial
Commercial
Commercial
t3
80%
t4
Operating Voltage
3.3V
3.3V
3.3V
CLK
50%
50%
CLK
20%
Figure 1. Duty Cycle Definition; DC = t2/t1
Note:
3. Not 100% tested.
Figure 2. Rise and Fall Time Definitions
Document #: 38-07382 Rev. **
Page 3 of 5
PRELIMINARY
Package Diagram
8-lead (150-Mil) SOIC S8
CY25001
51-85066-A
All products and company names mentioned in this document are the trademarks of their respective holders.
Document #: 38-07382 Rev. **
Page 4 of 5
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
PRELIMINARY
Document Title: CY25001 16-MHz Spread Spectrum Clock Generator
Document Number: 38-07382
REV.
**
ECN NO.
113264
Issue
Date
04/23/02
Orig. of
Change
CKN
New Data Sheet
Description of Change
CY25001
Document #: 38-07382 Rev. **
Page 5 of 5
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