Freescale Semiconductor
Advance Information
Document Number: MC33903_4_5
Rev. 5.0, 12/2010
SBC Gen2 with CAN High Speed
and LIN Interface
The 33903/4/5 is the second generation family of System Basis
Chips, which combines several features and enhances present module
designs. The device works as an advanced power management unit for
the MCU, additional integrated circuits such as sensors, and CAN
transceivers. It has a built-in enhanced high speed CAN interface
(ISO11898-2 and -5), with local and bus failure diagnostics, protection,
and fail safe operation mode. The SBC may include one or two LIN 2.1
interfaces with LIN output pin switches. It includes up to four wake-up
input pins than can also be configured as output drivers for flexibility.
This device implements multiple Low Power modes, with very low-
current consumption. In addition, the device is part of a family concept
where pin compatibility, among the various devices with and without
LIN interfaces, add versatility to module design.
The 33903/4/5 also implements an innovative and advanced fail-safe
state machine and concept solution.
33903/
33903/4/5
SYSTEM BASIS CHIP
EK SUFFIX (PB-FREE)
98ASA10556D
32-PIN SOIC
EK SUFFIX (PB-FREE)
98ASA10506D
54-PIN SOIC
Features
• Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with
possibility of usage external PNP to extend current capability and
share power dissipation
• Voltage, current, and temperature protection
• Extremely low quiescent current in low power modes
• Fully-protected embedded 5.0 V regulator for the CAN driver
• Multiple under-voltage detections to address various MCU
specifications and system operation modes (i.e. cranking)
• Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs,
with over-current detection and under-voltage protection
• MUX output pin for device internal analog signal monitoring and
power supply monitoring
• Advanced SPI, MCU, ECU power supply, and critical pins
diagnostics and monitoring.
• Multiple wake-up sources in low power modes: CAN or LIN bus, I/O
transition, automatic timer, SPI message, and V
DD
over-current
detection.
• ISO11898-5 high speed CAN interface compatibility for baud rates of
40 kb/s to 1.0 Mb/s
• Pb-free packaging designated by suffix code EK
ORDERING INFORMATION
See
Device Variations on page 2
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2010. All rights reserved.
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. Device Variations
- (All devices rated at T
A
= -40 TO 125 °C)
Freescale Part Number
MC33905D (Dual LIN)
MCZ33905D3EK/R2
*MCZ33905BD3EK/R2
MCZ33905D5EK/R2
*MCZ33905BD5EK/R2
MC33905S (Single LIN)
MCZ33905S3EK/R2
*MCZ33905BS3EK/R2
MCZ33905S5EK/R2
*MCZ33905BS5EK/R2
MC33904
MCZ33904A3EK/R2
*MCZ33904B3EK/R2
MCZ33904A5EK/R2
*MCZ33904B5EK/R2
MC33903
*MCZ33903B3EK/R2
*MCZ33903B5EK/R2
3.3 V
(1)
5.0 V
(1)
V
DD
output
voltage
CAN
interface
LIN
interface(s)
Wake-up input / LIN master
termination
Package
V
AUX
V
SENSE
MUX
3.3 V
1
2
2 wake-up + 2 LIN terms
or
3 wake-up + 1 LIN terms
or
4 wake-up + no LIN terms
SOIC 54 pins
exposed pad
Yes
Yes
Yes
5.0 V
3.3 V
3 wake-up + 1 LIN terms
5.0 V
1
1
or
4 wake-up + no LIN terms
SOIC 32 pins
exposed pad
Yes
Yes
Yes
3.3 V
1
no
4 wake-up
SOIC 32 pins
exposed pad
Yes
Yes
Yes
5.0 V
1
no
1 wake-up
SOIC 32 pins
exposed pad
No
No
No
Notes
1. V
DD
does not allow usage of an external PNP on the 33903. Output current limited to 100 mA.
*
“B” versions are recommended for new design. Changes resolved V
SUP
slow ramp up behavior, enhanced device current consumption
and improved oscillator.
33903/4/5
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
TABLE OF CONTENTS
TABLE OF CONTENTS
Features .................................................................................................................................................... 1
Device Variations ...................................................................................................................................... 2
Internal Block Diagram .............................................................................................................................. 6
Pin Connections ........................................................................................................................................ 9
Electrical Characteristics ......................................................................................................................... 13
Maximum Ratings ................................................................................................................................. 13
Static Electrical Characteristics ............................................................................................................ 15
Dynamic Electrical Characteristics ....................................................................................................... 23
Timing Diagrams .................................................................................................................................. 26
Functional Description ............................................................................................................................. 30
Introduction ........................................................................................................................................... 30
Functional Pin Description .................................................................................................................... 30
Functional Device Operation ................................................................................................................... 34
Mode and State Description ................................................................................................................. 34
Low Power Modes ................................................................................................................................ 35
State Diagram ....................................................................................................................................... 36
Mode Change ....................................................................................................................................... 37
Watchdog Operation ............................................................................................................................. 37
Functional Block Operation Versus Mode ............................................................................................ 39
Illustration of Device Mode Transitions. ................................................................................................ 39
Cyclic Sense Operation During Low Power Modes .............................................................................. 41
Behavior at Power Up and Power Down .............................................................................................. 43
Fail Safe Operation ................................................................................................................................. 45
CAN Interface ....................................................................................................................................... 49
CAN Interface Description .................................................................................................................... 49
CAN Bus Fault Diagnostic .................................................................................................................... 52
LIN Block ................................................................................................................................................. 55
LIN Interface Description ...................................................................................................................... 55
LIN Operational Modes ......................................................................................................................... 55
Serial Peripheral Interface ....................................................................................................................... 57
High Level Overview ............................................................................................................................. 57
Detail Operation .................................................................................................................................... 58
Detail of Control Bits And Register Mapping ........................................................................................ 61
Flags and Device Status ....................................................................................................................... 79
Typical Applications ................................................................................................................................ 86
Packaging ............................................................................................................................................... 91
33903/4/5
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
TABLE OF CONTENTS
V
BAT
D1
33905D
Q2
(5.0 V/3.3 V)
* = Option
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
TXD-L2
RXD-L2
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
LIN Bus
LIN Bus
CANL
LIN-TERM 1
LIN-1
LIN-TERM 2
LIN-2
Figure 1. 33905D Simplified Application Diagram
V
BAT
D1
33905S
Q2
(5.0 V/3.3 V)
* = Option
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L
RXD-L
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
V
BAT
CANL
LIN-T
LIN
I/O-3
LIN Bus
Figure 2. 33905S Simplified Application Diagram
33903/4/5
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
TABLE OF CONTENTS
V
BAT
D1
33904
Q2
(5.0 V/3.3 V)
* = Option
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
V
DD
SPI
A/D
MCU
I/O-1
CANH
V
BAT
SPLIT
CAN Bus
CANL
I/O-2
I/O-3
Figure 3. 33904 Simplified Application Diagram
V
BAT
D1
33903
VSUP1
DBG
SAFE
GND
VSUP2
VDD
RST
V
DD
INT
MOSI
SCLK
MISO
CS
SPI
I/O-0
MCU
CANH
CAN Bus
5V-CAN
TXD
RXD
SPLIT
CANL
Figure 4. 33903 Simplified Application Diagram
33903/4/5
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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