Si1010/1/2/3/4/5
Ultra Low Power, 16/8 kB, 12/10-Bit ADC
MCU with Integrated 240–960 MHz EZRadioPRO
®
Transceiver
Ultra Low Power: 0.9 to 3.6 V Operation
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Typical sleep mode current < 0.1 µA; retains state and
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-
-
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EZRadioPRO
®
Transceiver
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-
-
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Frequency range = 240–960 MHz
Sensitivity = –121 dBm
FSK, GFSK, and OOK modulation
Max output power = +20 dBm (Si1010/1), +13 dBm
(Si1012/3/4/5)
RF power consumption
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18.5 mA receive
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18 mA @ +1 dBm transmit
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30 mA @ +13 dBm transmit
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85 mA @ +20 dBm transmit (Si1010/1)
Data rate = 0.123 to 256 kbps
Auto-frequency calibration (AFC)
Antenna diversity and transmit/receive switch control
Programmable packet handler
TX and RX 64 byte FIFOs
Frequency hopping capability
On-chip crystal tuning
RAM contents over full supply range; fast wakeup of < 2 µs
Less than 600 nA with RTC running
Less than 1 µA with RTC running and radio state retained
On-chip dc-dc converter allows operation down to 0.9 V.
Two built-in brown-out detectors cover sleep and active
modes
10-Bit or 12-Bit Analog to Digital Converter
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Up to 300 ksps
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Up to 18 external inputs
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External pin or internal VREF (no external capacitor
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-
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required)
Built-in temperature sensor
External conversion start input option
Autonomous burst mode with 16-bit automatic averaging
accumulator
Dual Comparators
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Programmable hysteresis and response time
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Configurable as interrupt or reset source
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Low current (< 0.5 µA)
On-Chip Debug
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On-chip debug circuitry facilitates full-speed, non-intrusive
in-system debug (No emulator required)
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Digital Peripherals
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12 port I/O plus 3 GPIO pins; Hardware enhanced UART,
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SPI, and I
2
C serial ports available concurrently
Low power 32-bit SmaRTClock
Four general purpose 16-bit counter/timers; six channel
programmable counter array (PCA)
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Provides breakpoints, single stepping
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Inspect/modify memory and registers
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Complete development kit
High-Speed 8051 µC Core
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Pipelined instruction architecture; executes 70% of instruc-
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Memory
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768 bytes RAM 16 kB (Si1010/2/4) or 8 kB (Si1011/3/5)
Flash; In-system programmable
tions in 1 or 2 system clocks
Up to
25 MIPS
throughput with 25 MHz clock
Expanded interrupt handler
Clock Sources
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Precision internal oscillators: 24.5 MHz with ±2% accuracy
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-
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supports UART operation; spread-spectrum mode for
reduced EMI; Low power 20 MHz internal oscillator
External oscillator: Crystal, RC, C, CMOS clock
SmaRTClock oscillator: 32.768 kHz crystal or self-oscillate
Can switch between clock sources on-the-fly; useful in
power saving modes and in implementing various power
saving modes
Package
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42-pin QFN (5 x 7 mm)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
CRC
Port 0
CROSSBAR
EZRadio
PRO
Serial
Interface
Port 1
Port 2
EZRadioPRO
(240–960 MHz)
LNA
12/10-bit
75/300 ksps
ADC
+
IREF
+
–
PA
TEMP
SENSOR
VREF
VREG
–
VOLTAGE
COMPARATORS
Mixer
PGA
ADC
24.5 MHz PRECISION
INTERNAL OSCILLATOR
External Oscillator
20 MHz LOW POWER
INTERNAL OSCILLATOR
HARDWARE smaRTClock
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
HIGH-SPEED CONTROLLER CORE
16/8 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR
WDT
PLL
OSC
Rev. 1.0 9/10
Copyright © 2010 by Silicon Laboratories
Si1010/1/2/3/4/5
Si1010/1/2/3/4/5
Table of Contents
1. System Overview ..................................................................................................... 20
1.1. Typical Connection Diagram ............................................................................. 24
1.2. CIP-51™ Microcontroller Core .......................................................................... 25
1.2.1. Fully 8051 Compatible .............................................................................. 25
1.2.2. Improved Throughput................................................................................ 25
1.2.3. Additional Features ................................................................................... 25
1.3. Port Input/Output ............................................................................................... 26
1.4. Serial Ports ........................................................................................................ 27
1.5. Programmable Counter Array............................................................................ 27
1.6. SAR ADC with 16-Bit Auto-Averaging Accumulator and Autonomous Low Power
Burst Mode.......................................................................................................... 28
1.7. Programmable Current Reference (IREF0)....................................................... 29
1.8. Comparators...................................................................................................... 29
2. Ordering Information ............................................................................................... 31
3. Pinout and Package Definitions ............................................................................. 32
4. Electrical Characteristics ........................................................................................ 44
4.1. Absolute Maximum Specifications..................................................................... 44
4.2. Electrical Characteristics ................................................................................... 45
4.3. EZRadioPRO
®
Electrical Characteristics .......................................................... 69
4.4. Definition of Test Conditions for the EZRadioPRO Peripheral .......................... 76
5. SAR ADC with 16-Bit Auto-Averaging Accumulator and
Autonomous Low Power Burst Mode .................................................................... 77
5.1. Output Code Formatting .................................................................................... 78
5.2. Modes of Operation ........................................................................................... 79
5.2.1. Starting a Conversion................................................................................ 79
5.2.2. Tracking Modes......................................................................................... 80
5.2.3. Burst Mode................................................................................................ 81
5.2.4. Settling Time Requirements...................................................................... 82
5.2.5. Gain Setting .............................................................................................. 82
5.3. 8-Bit Mode ......................................................................................................... 83
5.4. 12-Bit Mode ....................................................................................................... 83
5.5. Low Power Mode............................................................................................... 83
5.6. Programmable Window Detector....................................................................... 91
5.6.1. Window Detector In Single-Ended Mode .................................................. 93
5.6.2. ADC0 Specifications ................................................................................. 93
5.7. ADC0 Analog Multiplexer .................................................................................. 94
5.8. Temperature Sensor.......................................................................................... 96
5.8.1. Calibration ................................................................................................. 96
5.9. Voltage and Ground Reference Options ........................................................... 99
5.10. External Voltage References......................................................................... 100
5.11. Internal Voltage References .......................................................................... 100
5.12. Analog Ground Reference............................................................................. 100
5.13. Temperature Sensor Enable ......................................................................... 100
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Si1010/1/2/3/4/5
5.14. Voltage Reference Electrical Specifications .................................................. 101
6. Programmable Current Reference (IREF0).......................................................... 102
6.1. PWM Enhanced Mode..................................................................................... 102
6.2. IREF0 Specifications ....................................................................................... 103
7. Comparators........................................................................................................... 104
7.1. Comparator Inputs........................................................................................... 104
7.2. Comparator Outputs ........................................................................................ 105
7.3. Comparator Response Time ........................................................................... 106
7.4. Comparator Hysteresis.................................................................................... 106
7.5. Comparator Register Descriptions .................................................................. 107
7.6. Comparator0 and Comparator1 Analog Multiplexers ...................................... 111
8. CIP-51 Microcontroller........................................................................................... 114
8.1. Performance .................................................................................................... 114
8.2. Programming and Debugging Support ............................................................ 115
8.3. Instruction Set.................................................................................................. 115
8.3.1. Instruction and CPU Timing .................................................................... 115
8.4. CIP-51 Register Descriptions .......................................................................... 119
9. Memory Organization ............................................................................................ 123
9.1. Program Memory............................................................................................. 123
9.1.1. MOVX Instruction and Program Memory ................................................ 124
9.2. Data Memory ................................................................................................... 124
9.2.1. Internal RAM ........................................................................................... 124
9.2.2. External RAM .......................................................................................... 125
10. On-Chip XRAM ..................................................................................................... 126
10.1. Accessing XRAM........................................................................................... 126
10.1.1. 16-Bit MOVX Example .......................................................................... 126
10.1.2. 8-Bit MOVX Example ............................................................................ 126
10.2. Special Function Registers............................................................................ 126
11. Special Function Registers................................................................................. 128
11.1. SFR Paging ................................................................................................... 129
12. Interrupt Handler.................................................................................................. 134
12.1. Enabling Interrupt Sources ............................................................................ 134
12.2. MCU Interrupt Sources and Vectors.............................................................. 134
12.3. Interrupt Priorities .......................................................................................... 135
12.4. Interrupt Latency............................................................................................ 135
12.5. Interrupt Register Descriptions ...................................................................... 137
12.6. External Interrupts INT0 and INT1................................................................. 144
13. Flash Memory....................................................................................................... 146
13.1. Programming the Flash Memory ................................................................... 146
13.1.1. Flash Lock and Key Functions .............................................................. 146
13.1.2. Flash Erase Procedure ......................................................................... 147
13.1.3. Flash Write Procedure .......................................................................... 147
13.2. Non-Volatile Data Storage............................................................................. 147
13.3. Security Options ............................................................................................ 148
13.4. Determining the Device Part Number at Run Time ....................................... 150
Rev. 1.0
3
Si1010/1/2/3/4/5
13.5. Flash Write and Erase Guidelines ................................................................. 151
13.5.1. VDD Maintenance and the VDD Monitor .............................................. 151
13.5.2. PSWE Maintenance .............................................................................. 151
13.5.3. System Clock ........................................................................................ 152
13.6. Minimizing Flash Read Current ..................................................................... 153
14. Power Management ............................................................................................. 157
14.1. Normal Mode ................................................................................................. 158
14.2. Idle Mode....................................................................................................... 158
14.3. Stop Mode ..................................................................................................... 159
14.4. Suspend Mode .............................................................................................. 160
14.5. Sleep Mode ................................................................................................... 161
14.6. Configuring Wakeup Sources........................................................................ 162
14.7. Determining the Event that Caused the Last Wakeup................................... 162
14.8. Power Management Specifications ............................................................... 165
15. Cyclic Redundancy Check Unit (CRC0)............................................................. 166
15.1. CRC Algorithm............................................................................................... 166
15.2. Preparing for a CRC Calculation ................................................................... 168
15.3. Performing a CRC Calculation ...................................................................... 168
15.4. Accessing the CRC0 Result .......................................................................... 168
15.5. CRC0 Bit Reverse Feature............................................................................ 173
16. On-Chip DC-DC Converter (DC0)........................................................................ 174
16.1. Startup Behavior............................................................................................ 175
16.2.
High Power Applications ............................................................................ 176
16.3. Pulse Skipping Mode..................................................................................... 176
16.4. Enabling the DC-DC Converter ..................................................................... 176
16.5. Minimizing Power Supply Noise .................................................................... 178
16.6. Selecting the Optimum Switch Size............................................................... 178
16.7. DC-DC Converter Clocking Options .............................................................. 178
16.8. DC-DC Converter Behavior in Sleep Mode ................................................... 179
16.9. Bypass Mode................................................................................................. 179
16.10. Low Power Mode......................................................................................... 180
16.11. Passive Diode Mode.................................................................................... 180
16.12. DC-DC Converter Register Descriptions ..................................................... 181
16.13. DC-DC Converter Specifications ................................................................. 183
17. Voltage Regulator (VREG0)................................................................................. 184
17.1. Voltage Regulator Electrical Specifications ................................................... 184
18. Reset Sources ...................................................................................................... 185
18.1. Power-On (VBAT Supply Monitor) Reset ...................................................... 186
18.2. Power-Fail (VDD_MCU/DC+ Supply Monitor) Reset .................................... 188
18.3. External Reset ............................................................................................... 191
18.4. Missing Clock Detector Reset ....................................................................... 191
18.5. Comparator0 Reset ....................................................................................... 191
18.6. PCA Watchdog Timer Reset ......................................................................... 191
18.7. Flash Error Reset .......................................................................................... 191
18.8. SmaRTClock (Real Time Clock) Reset ......................................................... 192
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Rev. 1.0
Si1010/1/2/3/4/5
18.9. Software Reset .............................................................................................. 192
19. Clocking Sources................................................................................................. 194
19.1. Programmable Precision Internal Oscillator .................................................. 195
19.2. Low Power Internal Oscillator........................................................................ 195
19.3. External Oscillator Drive Circuit..................................................................... 195
19.3.1. External Crystal Mode........................................................................... 195
19.3.2. External RC Mode................................................................................. 197
19.3.3. External Capacitor Mode....................................................................... 198
19.3.4. External CMOS Clock Mode ................................................................. 198
19.4. Special Function Registers for Selecting and Configuring the System Clock 199
20. SmaRTClock (Real Time Clock).......................................................................... 203
20.1. SmaRTClock Interface .................................................................................. 203
20.1.1. SmaRTClock Lock and Key Functions.................................................. 204
20.1.2. Using RTC0ADR and RTC0DAT to Access SmaRTClock
Internal Registers .................................................................................. 204
20.1.3. RTC0ADR Short Strobe Feature........................................................... 205
20.1.4. SmaRTClock Interface Autoread Feature ............................................. 205
20.1.5. RTC0ADR Autoincrement Feature........................................................ 206
20.2. SmaRTClock Clocking Sources .................................................................... 209
20.2.1. Using the SmaRTClock Oscillator with a Crystal or
External CMOS Clock ........................................................................... 209
20.2.2. Using the SmaRTClock Oscillator in Self-Oscillate Mode..................... 210
20.2.3. Using the Low Frequency Oscillator (LFO) ........................................... 210
20.2.4. Programmable Load Capacitance......................................................... 210
20.2.5. Automatic Gain Control (Crystal Mode Only) and
SmaRTClock Bias Doubling.................................................................. 211
20.2.6. Missing SmaRTClock Detector ............................................................. 212
20.2.7. SmaRTClock Oscillator Crystal Valid Detector ..................................... 213
20.3. SmaRTClock Timer and Alarm Function ....................................................... 213
20.3.1. Setting and Reading the SmaRTClock Timer Value ............................. 213
20.3.2. Setting a SmaRTClock Alarm ............................................................... 213
20.3.3. Software Considerations for using the SmaRTClock Timer and Alarm 214
21. Port Input/Output ................................................................................................. 219
21.1. Port I/O Modes of Operation.......................................................................... 220
21.1.1. Port Pins Configured for Analog I/O...................................................... 220
21.1.2. Port Pins Configured For Digital I/O...................................................... 220
21.1.3. Interfacing Port I/O to 5 V and 3.3 V Logic............................................ 221
21.1.4. Increasing Port I/O Drive Strength ........................................................ 221
21.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 221
21.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 221
21.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 222
21.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions ... 222
21.3. Priority Crossbar Decoder ............................................................................. 223
21.4. Port Match ..................................................................................................... 228
21.5. Special Function Registers for Accessing and Configuring Port I/O ............. 231
Rev. 1.0
5
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