MIC2808
RF PA Power Management IC
2MHz, 600mA DC/DC w/DAC Input and
Bypass Switch, Dual Low Noise
200mA/30mA LDO Regulators
General Description
The MIC2808 integrates a high performance 600mA
DC/DC step down regulator intended for powering a power
amplifier (PA) in a mobile phone with dual low noise low
dropout (LDO) regulators for the rest of the RF section.
Optimized for low noise performance, the MIC2808
improves efficiency in the handset without compromising
quality.
The MIC2808 has a 2MHz, constant frequency pulse width
modulated (PWM) DC/DC regulator designed for low noise
operation and high efficiency. The output voltage (V
OUT
) is
variable from 0.3V to the input voltage (V
IN
), adjustable
from 0.3V to 3.6V through a DAC input when V
IN
> V
OUT
.
The regulator will work in a 100% duty cycle mode to offer
maximum power and efficiency in the application. In
addition to 100% duty cycle, the DC/DC regulator has a
bypass mode of operation where the input voltage node
(PVIN pin) is shorted to the output voltage node (OUT pin)
through a 95mΩ switch.
The integrated dual low noise low dropout regulators are
optimized for high PSRR capability and fast turn-on times.
The constant frequency DC/DC regulator along with dual
low noise LDO regulators enables a very quiet and
efficient solution for mobile applications.
The MIC2808 is a µCap design, operating with small
ceramic output capacitors and inductors for stability,
reducing required board space and component cost and it
®
is available in the tiny 2.0mm x 2.5mm TMLF package.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Features
•
•
•
•
•
2.7V to 5.5V input voltage range
Stable with ceramic output capacitors
Tiny 16-pin 2.0mm x 2.5mm TMLF
®
Package
Thermal shutdown protection
Current limit protection
RF PA Power Supply DC/DC Regulator
•
Adjustable output power supply – DAC controlled
– V
OUT
= V
DAC
x 3
•
Bypass mode operation
– Internal 95mΩ switch between PVIN and OUT pins
– V
DAC
> 1.2V
•
Up to 600mA output current in PWM mode
•
100% duty cycle operation for maximum efficiency
•
Tiny 4.7µH, 1µF output inductor and capacitor
•
Low-noise 2MHz PWM operation
•
>90% efficiency
Dual Low Noise Low Dropout Regulators
•
High accuracy – ±2% over temperature
•
High PSRR – greater than 70dB
•
Very low output noise – 32µVrms
•
LDO1 – 200mA output current capability
•
LDO2 – 30mA output current capability
Applications
•
•
•
•
•
CDMA2000 mobile phones
UMTS/WCDMA mobile phones
WiMAX/Wibro modules
WiFi modules
Power amplifier modules (PAMs) with linear PAs
Typical Application
4.5
V
IN
= 4.2V
4.0 I
OUT
= 100mA
3.5
3.0
2.5
2.0
1.0
0.5
0
0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5
DAC VOLTAGE (V)
V
V
D
DC/DC Output Voltage
vs. DAC Voltage
1.5
CDMA2000/WCDMA RF Power Supply Circuit
MLF and
MicroLeadFrame
are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 2009
Bypass Mode
O
U
T
=
AC
x
3
M9999-071709-A
Micrel, Inc.
MIC2808
Pin Description
Pin
Number
1
2
3
4
5
Pin Name
LDO1
VIN
EN2
BYP
DAC
Pin Function
Output of the LDO1.
LDO1 and LDO2 Supply Voltage. Must be connected to PIN 9 (AVIN).
Enables the LDO2 regulator. Do not leave floating.
Filter capacitor for LDO1 and LDO2 internal voltage reference. Connect a 0.1µF capacitor-to-ground.
DAC Control Input (Analog Voltage Input). Provides control of output voltage of DC/DC regulator. The
output voltage is 3x’s the DAC voltage (Ex. 0.5V
DAC
= 1.5V
OUT
) when V
IN
> V
OUT
. Bypass mode is enabled
when the DAC voltage exceeds 1.2V or V
IN
≤
V
OUT
.
Signal ground.
No Connect.
Enables the DC/DC Regulator. Do not leave floating.
Supply voltage for DC/DC regulator control circuitry and reference voltage circuit. Must be connected to PIN
2 (VIN).
Enables LDO1 Regulator. Do not leave floating.
Supply Voltage: Requires bypass capacitor to ground.
Switch: Internal power MOSFET output switches of DC/DC regulator.
Power ground.
Drain of internal bypass switch, also serves as feedback for the internal regulator.
Output of the LDO2.
6
7
8
9
10
11
12
13
14, 15
16
AGND
NC
EN
AVIN
EN1
PVIN
SW
PGND
OUT
LDO2
July 2009
3
M9999-071709-A
Micrel, Inc.
MIC2808
Absolute Maximum Ratings
(1)
Supply Voltage (PV
IN
, AV
IN
, V
IN
) ............................ 0V to 6V
Output Switch Voltage (V
SW
). ...........................................6V
DAC Input Voltage (V
DAC
)....................................... 0V to V
IN
Logic Input Voltage (V
EN
, V
EN1
, V
EN2
) ..................... 0V to V
IN
Power Dissipation
(3)
...................................Internally Limited
Storage Temperature (T
s
) .........................–65°C to +150°C
ESD Rating
(4)
................................................................ ±2kV
Operating Ratings
(2)
Supply Voltage (PV
IN
, AV
IN
, V
IN
) ...................... 2.7V to 5.5V
Output Voltage (V
OUT
) ............................................ 0V to V
IN
Enable Voltage (V
EN
, V
EN1
, V
EN2
)............................ 0V to V
IN
DAC Input Voltage (V
DAC
).................................... 0.1V to V
IN
Junction Temperature (T
J
) ........................ –40°C to +125°C
Thermal Resistance
2.0mmx2.5mm TMLF-16 (θ
JA
)...........................96°C/W
Electrical Characteristics
(5)
DC/DC Regulator
V
IN
= PV
IN
= AV
IN
= V
EN
= 3.6V; V
DAC
= 0.6V; V
EN1
= V
EN2
= 0V; L = 4.7µH; C
OUT
= 1µF; T
A
= 25°C,
bold
values indicate
–40°C< T
J
< +125°C, unless noted.
LDO1/LDO2
V
IN
= V
EN1
= V
EN2
= 3.6V; C
OUTLDO1
= 2.2µF; V
EN
= 0V; C
OUTLDO2
= 1µF; I
OUT
= 100µA; T
A
= 25°C,
bold
values indicate
–40°C< T
J
< +125°C, unless noted.
Parameter
Supply Voltage Range
Total Quiescent Current
Enable Pin Threshold
Enable Pin Hysteresis
Enable Pin Input Current
Under-Voltage
Lockout Threshold
UVLO Hysteresis
Shutdown Temperature
(turn-on)
Condition
V
EN
= V
EN1
= V
EN2
= 3.6V
V
DAC
= 0.6V (DC/DC: not switching)
Logic Low
Logic High
Min
2.7
480
0.4
1.3
70
0.01
2.6
85
160
20
1
100
V
DAC
= 1.3V
V
DAC
= 0.6V (regulator on, not switching)
V
DAC
= 0.6V, I
LOAD
= 0mA
3.0V< V
IN
< 4.5, I
LOAD
= 10mA
0mA < I
OUT
< 400mA
I
SW
= -100mA, High-Side Switch
I
SW
= 100mA, Low-Side Switch
0.65
1.8
490
360
1.8
0.05
0.2
0.55
0.59
0.85
2
0.7
0.8
1.6
2.2
650
450
1.854
0.5
5
1
2.7
Typ
Max
5.5
Units
V
µA
V
V
mV
µA
V
mV
ºC
ºC
µA
%
µA
µA
V
%/V
%
Ω
Ω
A
MHz
Shutdown Temperature
Hysteresis
Total Shutdown Current
V
EN
= V
EN1
= V
EN2
= 0V
DC/DC Regulator [V
EN1
= V
EN2
= 0V]
Maximum Duty Cycle
Bypass Quiescent
Current
Quiescent Current
Output Voltage
Output Voltage
Line Regulation
Output Voltage
Load Regulation
Switch On-Resistance
Current Limit
(Peak SW Current)
Frequency
1.746
July 2009
4
M9999-071709-A
FPGA/CPLD
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