M65609E
128 K
8 Very Low Power CMOS SRAM Rad Tolerant
Introduction
The M65609E is a very low power CMOS static RAM
organized as 131072
×
8 bits.
TEMIC brings the solution to applications where fast
computing is as mandatory as low consumption, such as
aerospace electronics, portable instruments, or
embarked systems.
Utilizing an array of six transistors (6T) memory cells,
the M65609E combines an extremely low standby
supply current (Typical value = 0.2
µA)
with a fast
access time at 35 ns over the full military temperature
range. The high stability of the 6T cell provides
excellent protection against soft errors due to noise.
The M65609E is processed according to the methods of
the latest revision of the MIL STD 883 (class B or S),
ESA SCC 9000 or QML.
It is produced on the same process as the MH1RT sea of
gates series.
Features
D
Operating voltage: 3.3 V
D
Access time: 35, 70 ns
D
Very low power consumption
active : 200 mW (Max)
standby : 300
µW
(Typ)
D
Wide temperature Range : –55 To +125°C
D
400 Mils width package
D
D
D
D
D
D
TTL compatible inputs and outputs
Asynchronous
Designed on 0.35 micron process
Latch up immune
200 Krads capability
SEU LET better than 3 MeV
Interface
Block Diagram
9
10
Rev. A – June 5, 2000
1
Preliminary
M65609E
Pin Configuration
Pin Names
A0–A16
I/O0–I/O7
CS
1
CS
2
W
OE
V
CC
GND
Address inputs
Data Input/Output
Chip select 1
Chip select 2
Write Enable
Output Enable
Power
Ground
L
L
L
H
H
H
H
L
H
L
X
H
Data Out
Data In
Z
H
X
X
L
X
X
X
X
Truth Table
CS
1
CS
2
W
OE
INPUTS/
OUTPUTS
Z
Z
MODE
Deselect/
Power-down
Deselect/
Power Down
Read
Write
Output Disable
L = low, H = high, X = H or L, Z = high impedance.
32 pins Flatpack
400 MILS
VCC
A4
I/02
A7
I/01
A3
A6
A8
A0
A1
CS2
I/05
A2
W
I/06
GND
A5
A16
I/03
A15
A12
I/04
A13
A14
A9
A10
I/08
A11
OE
I/07
GND
CSI
2
Rev. A – June 5, 2000
Preliminary
M65609E
Electrical Characteristics
Absolute Maximum Ratings
Supply voltage to GND potential : . . . . . . . . . . . . . . . . - 0.5 V + 5 V
DC input voltage : . . . . . . . . . . . . . . . . . GND – 0,3 V to VCC + 0,3
DC output voltage high Z state : . . . . . . GND – 0,3 V to VCC + 0,3
Storage temperature : . . . . . . . . . . . . . . . . . . . . . . –65
°C
to + 150
°C
Output current into outputs (low) : . . . . . . . . . . . . . . . . . . . . . . 20 mA
Electro statics discharge voltage : . . . . . . . . . . . . . . . . . . . > 2 001 V
(MIL STD 883D method 3015.3)
Operating Range
OPERATING VOLTAGE
Military
3.3 V
±
10 %
OPERATING TEMPERATURE
– 55
_C
to + 125
_C
Recommended DC Operating Conditions
PARAMETER
Vcc
Gnd
VIL
VIH
DESCRIPTION
Supply voltage
Ground
Input low voltage
Input high voltage
MINIMUM
3
0.0
GND – 0.3
2.2
TYPICAL
3.3
0.0
0.0
–
MAXIMUM
3.6
0.0
0.8
V
CC
+ 0.3
UNIT
V
V
V
V
Capacitance
PARAMETER
Cin (1)
Cout (1)
Note :
DESCRIPTION
Input low voltage
Output high volt
MINIMUM
–
–
TYPICAL
–
–
MAXIMUM
8
8
UNIT
pF
pF
1. Guaranteed but not tested.
DC Parameters
PARAMETER
IIX (2)
IOZ (2)
VOL (3)
VOH (4)
Notes :
DESCRIPTION
Input leakage current
Output leakage current
Output low voltage
Output high voltage
MINIMUM
–1
–1
–
2.4
TYPICAL
–
–
–
–
MAXIMUM
1
1
0.4
–
UNIT
µA
µA
V
2. Gnd < Vin < Vcc, Gnd < Vout < Vcc Output Disabled.
3. Vcc min. IOL = 1 mA.
4. Vcc min. IOH = 0.5 mA.
Rev. A – June 5, 2000
3
Preliminary
M65609E
Consumption
SYMBOL
ICCSB (5)
ICCSB
1
(6)
ICCOP (7)
Notes :
DESCRIPTION
Standby supply current
Standby supply current
Dynamic operating current
65609E
– 35
2.5
300
65
UNIT
mA
µA
mA
VALUE
max
max
max
5. CS
1
≥
VIH or CS
2
≤
VIL and CS
1
≤
VIL.
6. CS
1
≥
Vcc – 0.3 V or, CS
2
< Gnd + 0.3 V and CS
1
≤
0.2 V
7. F = 1/TAVAV, Iout = 0 mA, W = OE = VIH, Vin = Gnd/Vcc, Vcc max.
4
Rev. A – June 5, 2000
Preliminary
M65609E
Write Cycle
SYMBOL
TAVAW
TAVWL
TAVWH
TDVWH
TE
1
LWH
TE
2
HWH
TWLQZ
TWLWH
TWHAX
TWHDX
TWHQX
Write cycle time
Address set-up time
Address valid to end of write
Data set-up time
CS
1
low to write end
CS
2
high to write end
Write low to high Z (11)
Write pulse width
Address hold from to end of write
Data hold time
Write high to low Z (11)
PARAMETER
65609E
– 35
35
0
25
20
28
28
15
25
+3
+3
0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
VALUE
min
min
min
min
min
min
max
min
min
min
min
Read Cycle
SYMBOL
TAVAV
TAVQV
TAVQX
TE
1
LQV
TE
1
LQX
TE
1
HQZ
TE
2
HQV
TE
2
HQX
TE
2
LQZ
TGLQV
TGLQX
TGHQZ
Read cycle time
Address access time
Address valid to low Z
Chip-select
1
access time
CS
1
low to low Z (11)
CS
1
high to high Z (11)
Chip-select
2
access time
CS
2
high to low Z (11)
CS
2
low to high Z (11)
Output Enable access time
OE low to low Z (11)
OE high to high Z (11)
PARAMETER
65609E
– 35
35
35
10
35
3
20
35
3
20
12
0
10
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
VALUE
min
max
min
max
min
max
max
min
max
max
min
max
Notes :
11. Parameters guaranteed, not tested, with output loading 5 pF. (see fig. 1.b.).
Rev. A – June 5, 2000
5
Preliminary
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