Not Recommended for New Designs
This product was manufactured for Maxim by an outside wafer foundry
using a process that is no longer available. It is not recommended for
new designs. The data sheet remains available for existing users.
A Maxim replacement or an industry second-source may be available.
Please see the QuickView data sheet for this part or contact technical
support for assistance.
For further information,
contact Maxim’s Applications Tech Support.
19-2399; Rev 2; 6/90
Single/Dual, Very Fast TTL Output Comparators
MAX9686/MAX9698
General Description
The MAX9686 (single)/MAX9698 (dual) are very fast
TTL comparators manufactured with a high-frequency
bipolar process (f
T
= 6GHz) that are capable of very
short propagation delays, yet maintain the excellent DC
matching characteristics that are normally found only in
slower comparators. The MAX9698 is a dual version of
the MAX9686.
The MAX9686/MAX9698 have differential inputs and
complementary outputs that are fully compatible with
TTL logic levels. The extremely short propagation
delays allow signal processing at frequencies in excess
of 200MHz.
When the latch enable input goes high, the outputs go
to the states defined by the input condition at the time
of the latch transition. The outputs remain latched as
long as the LE pin remains high. If the latch enable
function is not used, the LE pin must be tied to ground.
♦
6ns Propagation Delay
♦
2ns Latch Setup Time
♦
+5V, -5.2V Power Supplies
♦
Pin Compatible to LT1016, Am686
♦
Available in Commercial and Military Versions
♦
Available in SO
Features
Ordering Information
PART
MAX9686CPA
MAX9686CJA
MAX9686CSA
MAX9686C/D
MAX9686CTV
MAX9686MJA
MAX9686MTV
MAX9698CPE
MAX9698CJE
MAX9698CSE
MAX9698C/D
MAX9698MJE
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-55°C to +125°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-55°C to +125°C
PIN-PACKAGE*
8 Plastic Dip
8 CERDIP
8 SO
Dice
8 TO-99 Metal Can
8 CERDIP
8 TO-99 Metal Can
16 Plastic Dip
16 CERDIP
16 SO
Dice
16 CERDIP
Applications
High-Speed Analog-to-Digital Converters
High-Speed Line Receivers
Peak Detectors
Threshold Detectors
High-Speed Triggers
*Contact
factory for availability of 20-lead LCC.
Pin Configurations
TOP VIEW
Q1 1
OUT
+
16 Q2
15 Q2
14 GND
13 LE2
12 N.C.
11 V
+
10 -IN2
9 +IN2
MAX9698
Q1 2
7
OUT
GND 3
LE1 4
V
1
8 OUT
7 OUT
+IN 2
+
8
1
V
+IN 2
-IN 3
V
-
4
MAX9686
6 GND
N.C. 5
3
MAX9686
6 GND
5 LE
-IN
5
LE
V
-
6
-IN1 7
+IN1 8
PLASTIC DIP, CERDIP,
SO
4
-
V
TO-99 METAL CAN
PLASTIC DIP, CERDIP,
SO
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Single/Dual, Very Fast TTL Output Comparators
MAX9686/MAX9698
ABSOLUTE MAXIMUM RATINGS
Supply Voltages.....................................................................±6V
Power Dissipation (Notes 1, 2).........................................336mW
Input Voltages........................................................................±5V
Differential Input Voltages ........................................................5V
Output Current ....................................................................20mA
Note 1:
Power derating above T
A
= +70°C is based on a maxi-
mum junction temperature of +150°C and the follow-
ing thermal resistance factors.
Operating Temperature Ranges:
Commercial (MAX9686C/MAX9698M) ................0°C to +70°C
Military (MAX9686M/MAX9698M) ...................-55°C to +125°C
Storage Temperature Range .............................-55°C to +150°C
Lead Temperature (soldering, 10s)....................................300°C
Note 2:
Continuous short-circuit protection is allowed to the
following case and ambient temperatures: for
MAX9698, continuous short circuit is allowed on one
comparator at a time up to case temperature of +85°C
and ambient temperatures of +30°C.
PACKAGE
DIP
SO
TO-99
T
C
(°C)
110
95
95
T
A
(°C)
70
70
30
PACKAGE
DIP
SO
TO-99
θ
JC
(°C/W)
75
115
115
θ
JA
(°C/W)
180
180
150
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
S
= ±5V, T
A
= +25°C, unless otherwise noted.)
PARAMETER
Input Offset Voltage
Temperature Coefficient
Input Offset Current
Input Bias Current
Common-Mode Rejection Ratio
Power-Supply Rejection Ratio
Input Voltage Range
Latch High Input Voltage
Latch Low Input Voltage
Latch Low Input Current
I/O Logic Levels (Output High
Voltage)
I/O Logic Levels (Output Low
Voltage)
Positive Supply Current
Negative Supply Current
V
OH
V
OL
I
CC
I
EE
I
OUT
= -3mA
I
OUT
= 8mA
MAX9686
MAX9698
MAX9686
MAX9698
16
32
13
26
2.4
3.0
0.5
25
50
20
40
16
32
13
26
SYMBOL
V
OS
∆V
OS
/∆
T
I
OS
I
B
CMRR
PSRR
80
70
-3.0
2.0
0.8
-750
2.4
3.0
0.5
25
50
20
40
96
85
+3.0
CONDITIONS
R
S
= 100Ω
MAX9686C/9698C
MIN
-3
4
5.0
25
80
70
-3.0
2.0
0.8
-750
96
85
+3.0
TYP
MAX
+3
MAX9686M/9698M
MIN
-3
4
5.0
25
TYP
MAX
+3
UNITS
mV
µV/°C
µA
µA
dB
dB
V
V
V
µA
V
V
mA
mA
2
_______________________________________________________________________________________
Single/Dual, Very Fast TTL Output Comparators
ELECTRICAL CHARACTERISTICS (continued)
(V
S
= ±5V, T
A
= +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MAX9686C/9698C
MIN
TYP
MAX
MAX9686M/9698M
MIN
TYP
MAX
UNITS
MAX9686/MAX9698
SWITCHING CHARACTERISTICS (EACH COMPARATOR FOR MAX9698)
Propagation Delays (Guaranteed
Over Full Temperature Range)
Input to Output High
Input to Output Low
Propagation Delay Skew
Latch Setup
t
pd+
100mV pulse; 10mV
overdrive
100mV pulse; 10mV
overdrive
6.0
9.0
6.0
9.0
ns
t
pd-
t
pd+
- t
pd-
t
S
5.7
0.3
2
8.5
5.7
0.3
2
8.5
ns
ns
ns
LATCH
ENABLE
LATCH
50%
COMPARE
t
s
t
h
t
pw
(E)
DIFFERENTIAL
INPUT
VOLTAGE
V
IN
V
OD
V
OS
t
pd
Q
t
pd
(E)
50%
50%
Q
MAX9686 and MAX9698 Timing Diagram (worst case)
Applications Information
Layout
Because of the large gain-bandwidth characteristic of
the MAX9686 and MAX9698, special precautions need
to be taken if the high-speed capabilities of the devices
are to be realized. A PC board with ground plane
should be considered mandatory. All decoupling
capacitors should be mounted as close as possible to
the power-supply pins. For low-impedance applica-
tions, microstrip layout at the input may be helpful.
Close attention should be paid to the bandwidth of the
decoupling and terminating components. Chip compo-
nents to minimize lead inductance can be used as an
advantage. An unused latch enable pin must be con-
nected to ground.
Input Slew-Rate Requirements
As with all high-speed comparators, the high gain-
bandwidth product of these devices creates oscillation
problems when the input traverses through the linear
region. For clean switching without oscillation or steps
in the output waveform, the input must meet certain
minimum slew-rate requirements. The tendency of the
part to oscillate is a function of the layout and the
source impedance of the circuit employed. Both poor
layout and larger source impedance will increase the
minimum slew-rate requirement.
3
_______________________________________________________________________________________
Single/Dual, Very Fast TTL Output Comparators
MAX9686/9698
Definition of Terms
V
OS
Input Offset Voltage—The voltage required
between the input terminals to obtain 0V dif
ferential at the output.
Input Voltage Pulse Amplitude
Input Voltage Overdrive
Input to Output High Delay—The propagation
delay measured from the time the input sig
nal crosses the input offset voltage to the
50% point of an output LOW to HIGH transition.
Input to Output Low Delay—The propagation
delay measured from the time the input sig
nal crosses the input offset voltage to the
50% point of an output HIGH to LOW transition.
Latch Enable to Output High Delay—The
propagation delay measured from the 50%
point of the Latch-Enable signal HIGH
LOtransition to the 50% point of an output
LOW to HIGH transition.
t
pd-
(E)
Latch Enable to Output Low Delay—The prop
agation delay measured from the 50%
point of the Latch-Enable signal HIGH to
LOW transition to the 50% point of an output
HIGH to LOW transition.
Minimum Latch Enable Pulse Width—The
minimum time the Latch-Enable signal must
be LOW to acquire and hold an input signal.
Minimum Setup Time—The minimum time,
before the positive transition of the Latch-
Enable pulse, that an input signal must be
present to be acquired and
held at the outputs.
Minimum Hold Time—The minimum time,
after the positive transition of the Latch-
Enable signal, than an input signal must
remain unchanged to be acquired and held
at the output.
V
IN
V
OD
t
pd+
t
pw
(E)
t
s
t
pd-
t
n
t
pd+
(E)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
4
_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
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