FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
April 2009
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed,
Differential Driver
Description
Features
Greater than 600Mbs Data Rate
3V Power Supply Operation
5ns Maximum Differential Pulse Skew
1.5ns Maximum Propagation Delay
Low Power Dissipation
Power-Off Protection
Meets or Exceeds the TIA/EIA-644 LVDS Standard
Flow-through Pinout Simplifies PCB Layout
This dual driver is designed for high-speed
interconnects utilizing Low Voltage Differential Signaling
(LVDS) technology. The driver translates LVTTL signal
levels to LVDS levels with a typical differential output
swing of 350mV, which provides low EMI at ultra-low
power dissipation, even at high frequencies. This device
is ideal for high-speed transfer of clock or data.
The FIN1027 or FIN1027A can be paired with its
companion receiver, the FIN1028, or with any other
LVDS receiver.
Ordering Information
Part Number
FIN1027M
FIN1027MX
FIN1027K8X
FIN1027AMX
Operating
Temperature Range
-40 to +85°C
-40 to +85°C
-40 to +85°C
-40 to +85°C
Eco Status
Green
Green
RoHS
Green
Package
8-Lead Small Outline Package (SOIC)
JEDEC MS-012, 0.150 inch Narrow
8-Lead Small Outline Package (SOIC)
JEDEC MS-012, 0.150 inch Narrow
8-Lead US8, JEDEC MO-187,
Variation CA 3.1mm Wide
8-Lead Small Outline Package (SOIC)
JEDEC MS-012, 0.150 inch Narrow
Packing
Method
Trays
Tape and Reel
Tape and Reel
Tape and Reel
For Fairchild’s definition of Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027 • Rev. 1.0.3
www.fairchildsemi.com
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Pin Configuration
Figure 1. FIN1027 SOIC Pin Assignment (Top View)
Figure 2. FIN1027A SOIC Pin Assignment (Top View)
Figure 3. FIN1027 US8 Pin Assignment (Top View)
Pin Definitions
Name
V
CC
D
IN1
D
IN2
GND
D
OUT2-
D
OUT2+
D
OUT1+
D
OUT1-
Pin #
FIN1027
SOIC
1
2
3
4
5
6
7
8
Pin #
FIN1027A
SOIC
1
2
3
4
5
6
8
7
Pin #
FIN1027
US8
8
7
6
5
4
3
2
1
Description
Power Supply
LVTTL Data Input
LVTTL Data Input
Ground
Inverting Driver Output
Non-Inverting Driver Output
Non-Inverting Driver Output
Inverting Driver Output
Function Table
Input
D
IN
LOW
HIGH
OPEN
D
OUT+
LOW
HIGH
LOW
Outputs
D
OUT-
HIGH
LOW
HIGH
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
2
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
V
CC
D
IN
D
OUT
I
OSD
T
STG
T
J
T
L
ESD
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
Driver Short-Circuit Current
Storage Temperature Range
Maximum Junction Temperature
Lead Temperature,
Soldering, 10 Seconds
Human Body Model, JESD22-A114
Machine Model, JESD22-A115
Min.
-0.5
-0.5
-0.5
Continuous
-65
Max.
4.6
6.0
4.7
+150
+150
+260
≥6500
≥400
Unit
V
V
V
mA
°C
°C
°C
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
CC
V
IN
T
A
Input Voltage
Parameter
Supply Voltage
Operating Temperature
Min.
3.0
0
-40
Max.
3.6
V
CC
+85
Unit
V
V
°C
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
3
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
DC Electrical Characteristics
All typical values are at T
A
= 25°C and V
CC
= 3.3V. Over-supply voltage and operating temperature ranges, unless
otherwise noted.
Symbol
V
OD
ΔV
OD
V
OS
ΔV
OS
I
OFF
I
OS
V
IH
V
IL
I
IN
I
I(OFF)
V
IK
I
CC
C
IN
C
OUT
Parameter
Output Differential Voltage
V
OD
Magnitude Change from
Differential LOW-to-HIGH
Offset Voltage
Offset Magnitude Change from
Differential LOW-to-HIGH
Power-Off Output current
Short-Circuit Output Current
Input HIGH Voltage
Input LOW Voltage
Input Current
Power-Off Input Current
Input Clamp Voltage
Power Supply Current
Input Capacitance
Output Capacitance
Conditions
Min.
250
Typ.
350
Max.
450
25
Units
mV
mV
V
mV
µA
mA
V
V
µA
µA
V
mA
mA
pF
pF
R
L
= 100Ω, Figure 4
1.125
1.250
1.375
25
V
CC
= 0V, V
OUT
= 0V or 3.6V
V
OUT
= 0V
V
OD
= 0V
2.0
GND
V
IN
= 0V or V
CC
V
CC
= 0V, V
IN
= 0V or 3.6V
I
IK
= -18mA
No Load, V
IN
= 0V or V
CC
R
L
= 100Ω, V
IN
= 0V or V
CC
4
6
-1.5
±20
-8
±8
V
CC
0.8
±20
±20
12.5
17.0
AC Electrical Characteristics
All typical values are at T
A
= 25°C and V
CC
= 3.3V. Over-supply voltage and operating temperature ranges, unless
otherwise noted.
Symbol
t
PLHD
t
PHLD
t
TLHD
t
THLD
t
SK(P)
t
SK(LH),
t
SK(HL)
t
SK(PP)
Parameter
Differential Propagation Delay,
LOW-to-HIGH
Differential Propagation Delay,
HIGH-to-LOW
Differential Output Rise Time
(20% to 80%)
Differential Output Fall Time
(80% to 20%)
Pulse Skew
⏐t
PLH -
t
PHL
⏐
Channel-to-Channel Skew
Part-to-Part Skew
(2)
(1)
Conditions
Min.
0.5
0.5
Typ.
Max.
1.5
1.5
1.0
1.0
0.5
0.3
1.0
Units
ns
ns
ns
ns
ns
ns
ns
R
L
= 100Ω,
C
L
= 10pF,
Figure 5, Figure 6
0.4
0.4
Notes:
1. t
SK(LH)
, t
SK(HL)
is the skew between specified outputs of a single device when the outputs have identical loads and
are switching in the same direction.
2. t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two
devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with
the same supply voltage, same temperature, and have identical test circuits.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
4
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Test Diagrams
Figure 4.
Differential Driver DC Test Circuit
Note A: All input pulses have frequency = 10MHz,
t
R
or t
F
=2ns.
Note B: C
L
includes all probe and fixture capacitances.
Figure 5.
Differential Driver Propagation Delay and Transition Time Test Circuit
Figure 6.
AC Waveforms
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
5
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