19-4111; Rev 0; 5/08
KIT
ATION
EVALU
BLE
AVAILA
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
General Description
The MAX5098A is a dual-output, high-switching-frequen-
cy DC-DC converter with integrated n-channel switches
that can be used either in high-side or low-side configura-
tion. Each output can be configured either as a buck con-
verter or a boost converter. In the buck configuration, this
device delivers up to 2A from converter 1 and 1A from
converter 2. The MAX5098A also integrates a load-dump
protection circuitry that is capable of handling load-dump
transients up to 80V for automotive applications. The
load-dump protection circuit utilizes an internal charge-
pump to drive the gate of an external n-channel MOSFET.
When an overvoltage or load-dump condition occurs, the
series protection MOSFET absorbs the high voltage tran-
sient to prevent damage to lower voltage components.
The DC-DC converters operate over a wide operating
voltage range from 4.5V to 19V. The MAX5098A oper-
ates 180° out-of-phase with an adjustable switching fre-
quency to minimize external components while allowing
the ability to make trade-offs between the size, efficiency,
and cost. The high switching frequency (up to 2.2MHz)
also allows this device to operate outside the AM band
for automotive applications.
This device utilizes voltage-mode control for stable oper-
ation and external compensation, thus the loop gain is
tailored to optimize component selection and transient
response. This device can be synchronized to an exter-
nal clock fed at the SYNC input. Also, a clock output
(CKO) allows a master-slave connection of two devices
with a four-phase synchronized switching sequence.
Additional features include internal digital soft-start, indi-
vidual enable for each DC-DC regulator (EN1 and EN2),
open-drain power-good outputs (PGOOD1 and
PGOOD2), and a shutdown input (ON/OFF).
Other features of the MAX5098A include overvoltage pro-
tection, short-circuit (hiccup current limit) and thermal
protection. The MAX5098A is available in a thermally
enhanced, exposed pad, 5mm x 5mm, 32-pin TQFN
package and is fully specified over the automotive
-40°C to +125°C temperature range.
Features
o
Wide 4.5V to 5.5V or 5.2V to 19V Input Voltage
Range (with Up to 80V Load-Dump Protection)
o
Dual-Output DC-DC Converter with Integrated
Power MOSFETs
o
Each Output Configurable in Buck or Boost Mode
o
Adjustable Outputs from 0.8V to 0.85V
IN
Buck
Configuration) and from V
IN
to 28V (Boost
Configuration)
o
I
OUT1
and I
OUT2
of 2A and 1A (Respectively) in
Buck Configuration
o
Switching Frequency Programmable from 200kHz
to 2.2MHz
o
Synchronization Input (SYNC)
o
Clock Output (CKO) for Four-Phase Master-Slave
Operation
o
Individual Converter Enable Input and Power-
Good Output
o
Low-I
Q
(7µA) Standby Current (ON/OFF)
o
Internal Digital Soft-Start and Soft-Stop
o
Short-Circuit Protection on Outputs and
Maximum Duty-Cycle Limit
o
Overvoltage Protection on Outputs with Auto
Restart
o
Thermal Shutdown
o
Thermally Enhanced 32-Pin TQFN Package
Dissipates up to 2.7W at +70°C
MAX5098A
Ordering Information
PART
TEMP RANGE
-40°C to +125°C
PIN-PACKAGE
32 TQFN-EP*
MAX5098AATJ+
Applications
Automotive AM/FM Radio Power Supply
Automotive Instrument Cluster Display
+Denotes
a lead-free package.
*EP
= Exposed pad.
Pin Configuration appears at end of data sheet
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
MAX5098A
ABSOLUTE MAXIMUM RATINGS
V+ to SGND............................................................-0.3V to +25V
V+ to IN_HIGH...........................................................-19V to +6V
IN_HIGH to SGND ..................................................-0.3V to +19V
IN_HIGH Maximum Input Current .......................................60mA
BYPASS to SGND..................................................-0.3V to +2.5V
GATE to V+.............................................................-0.3V to +12V
GATE to SGND .......................................................-0.3V to +36V
SGND to PGND_ ...................................................-0.3V to +0.3V
V
L
to SGND ..................-0.3V to the Lower of +6V or (V+ + 0.3V)
VDRV to SGND .........................................................-0.3V to +6V
BST1/VDD1, BST2/VDD2, DRAIN_,
PGOOD_ to SGND ..............................................-0.3V to +30V
ON/OFF to SGND ...............................-0.3V to (IN_HIGH + 0.3V)
BST1/VDD1 to SOURCE1,
BST2/VDD2 to SOURCE2......................................-0.3V to +6V
SOURCE_ to SGND................................................-0.6V to +25V
SOURCE_ to PGND_.................................................-1V for 50ns
EN_ to SGND............................................................-0.3V to +6V
OSC, FSEL_1, COMP_, SYNC,
FB_ to SGND..............................................-0.3V to (V
L
+ 0.3V)
CKO to SGND..........................................-0.3V to (VDRV + 0.3V)
SOURCE1, DRAIN1 Peak Current ..............................5A for 1ms
SOURCE2, DRAIN2 Peak Current ..............................3A for 1ms
V
L
, BYPASS to
SGND Short Circuit ................... Continuous, Internally Limited
Continuous Power Dissipation (T
A
= +70°C)
32-Pin TQFN-EP (derate 34.5mW/°C above +70°C)..2759mW
Package Junction-to-Ambient
Thermal Resistance (θ
JA
) (Note 1).............................29.0°C/W
Package Junction-to-Case
Thermal Resistance (θ
JC
) (Note 1) ..............................1.7°C/W
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range ............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) ................................+300°C
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specifications. For detailed information
on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDRV = V
L
, V+ = V
L
= IN_HIGH = 5.2V or V+ = IN_HIGH = 5.2V to 19V, EN_ = V
L
, SYNC = GND, I
VL
= 0mA, PGND_ = SGND,
C
BYPASS
= 0.22µF (low ESR), C
VL
= 4.7µF (ceramic), C
V+
= 1µF (low ESR), C
IN_HIGH
= 1µF (ceramic), R
IN_HIGH
= 3.9kΩ, R
OSC
= 10kΩ,
T
J
= -40°C to +125°C, unless otherwise noted.) (Note 2)
PARAMETER
SYSTEM SPECIFICATIONS
Input Voltage Range
V+ Operating Supply Current
V+ Standby Supply Current
V+
I
Q
I
V+STBY
V+ = IN_HIGH
V
L
= V+ = IN_HIGH (Note 3)
V
L
unloaded, no switching
V
EN_
= 0V, PGOOD_ unconnected, V+ =
V
IN_HIGH
= 14V
(V
OUT1
= 5V at 1.5A,
V
OUT2
= 3.3V at 0.75A,
f
SW
= 1.85MHz
I
SINK
= 10mA
1mA < I
SINK
< 50mA
I
IN_HIGH
V
EN_
= V
PGOOD_
= V
GATE
= 0V,
V
IN_HIGH
= V
ON/OFF
= 14V
V
ON/OFF
= 0V, PGOOD_ = V+ =
unconnected, V
IN_HIGH
= 14V, T
A
= -40°C
to +85°C
V
OV
= V+ - V
IN_HIGH
, I
GATE
= 0mA
(sinking)
1.2
V+ = V
L
= 5.2V
V+ = 12V
V+ = 16V
19
5.2
4.5
4.2
0.75
78
76
70
20
160
270
600
21
V
mV
µA
%
1.1
19
5.5
V
mA
mA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Efficiency
OVERVOLTAGE PROTECTOR
IN_HIGH Clamp Voltage
IN_HIGH Clamp Load
Regulation
IN_HIGH Supply Current
IN_HIGH Standby Supply
Current
V+ to IN_HIGH Overvoltage
Clamp
η
IN_HIGH
I
IN_HIGHSTBY
7
9
µA
V
OV
1.85
2.5
V
2
_______________________________________________________________________________________
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
ELECTRICAL CHARACTERISTICS (continued)
(VDRV = V
L
, V+ = V
L
= IN_HIGH = 5.2V or V+ = IN_HIGH = 5.2V to 19V, EN_ = V
L
, SYNC = GND, I
VL
= 0mA, PGND_ = SGND,
C
BYPASS
= 0.22µF (low ESR), C
VL
= 4.7µF (ceramic), C
V+
= 1µF (low ESR), C
IN_HIGH
= 1µF (ceramic), R
IN_HIGH
= 3.9kΩ, R
OSC
= 10kΩ,
T
J
= -40°C to +125°C, unless otherwise noted.) (Note 2)
PARAMETER
IN_HIGH Startup Voltage
GATE Charge Current
SYMBOL
IN_HIGH
UVLO
I
GATE_CH
CONDITIONS
Rising, ON/OFF = IN_HIGH, GATE rising
Falling, ON/OFF = IN_HIGH, GATE falling
V
IN_HIGH
= V
ON/OFF
= 14V,
V
GATE
= V+ = 0V
V+ = V
IN_HIGH
= V
ON/OFF
= 4.5V,
I
GATE
= 1µA, sourcing
V+ = V
IN_HIGH
= V
ON/OFF
= 14V,
I
GATE
= 1µA, sourcing
V
IN_HIGH
= 14V, V
ON/OFF
= 0V, V+ = 0V,
V
GATE
= 5V, sinking
20
4.0
MIN
TYP
3.6
3.45
45
5.3
9
3.6
mA
80
7.5
V
MAX
4.1
UNITS
V
µA
MAX5098A
GATE Output Voltage
V
GATE
-
V
IN_HIGH
GATE Turn-Off Pulldown
Current
STARTUP/V
L
REGULATOR
V
L
Undervoltage Lockout Trip
Level
V
L
Undervoltage Lockout
Hysteresis
V
L
Output Voltage
V
L
LDO Short-Circuit Current
V
L
LDO Dropout Voltage
BYPASS OUTPUT
BYPASS Voltage
BYPASS Load Regulation
SOFT-START/SOFT-STOP
Digital Ramp Period Soft-
Start/Soft-Stop
Soft-Start/Soft-Stop
VOLTAGE-ERROR AMPLIFIER
FB_ Input Bias Current
FB_ Input Voltage Set Point
FB_ to COMP_
Transconductance
INTERNAL MOSFETS
On-Resistance High-Side
MOSFET Converter 1
I
GATE_PD
UVLO
V
L
falling
3.9
4.1
180
4.3
V
mV
V
L
I
VL_SHORT
V
LDO
V
BYPASS
ΔV
BYPASS
I
SOURCE_
= 0 to 40mA, 5.5V
≤
V+
≤
19V
V+ = V
IN_HIGH
= 5.2V
I
SOURCE_
= 40mA, V+ = V
IN_HIGH
= 4.5V
I
BYPASS
= 0µA
0 < I
BYPASS
< 100µA (sourcing)
5.0
5.2
130
300
5.5
550
2.02
5
V
mA
mV
V
mV
1.98
2.00
2
Internal 6-bit DAC
2048
64
f
SW
Clock
Cycles
Steps
250
nA
V
mS
I
FB_
V
FB_
g
M
-40°C
≤
T
A
≤
+85°C
-40°C
≤
T
A
≤
+125°C
0.783
0.785
1.4
2.4
0.8
0.809
0.814
3.4
R
ON1
I
SWITCH
= 100mA, BST1/VDD1 to
V
SOURCE1
= 5.2V
I
SWITCH
= 100mA, BST1/VDD1 to
V
SOURCE1
= 4.5V
195
mΩ
208
355
_______________________________________________________________________________________
3
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
MAX5098A
ELECTRICAL CHARACTERISTICS (continued)
(VDRV = V
L
, V+ = V
L
= IN_HIGH = 5.2V or V+ = IN_HIGH = 5.2V to 19V, EN_ = V
L
, SYNC = GND, I
VL
= 0mA, PGND_ = SGND,
C
BYPASS
= 0.22µF (low ESR), C
VL
= 4.7µF (ceramic), C
V+
= 1µF (low ESR), C
IN_HIGH
= 1µF (ceramic), R
IN_HIGH
= 3.9kΩ, R
OSC
= 10kΩ,
T
J
= -40°C to +125°C, unless otherwise noted.) (Note 2)
PARAMETER
On-Resistance High-Side
MOSFET Converter 2
SYMBOL
CONDITIONS
I
SWITCH
= 100mA, BST2/VDD2 to
V
SOURCE2
= 5.2V
I
SWITCH
= 100mA, BST2/VDD2 to
V
SOURCE2
= 4.5V
V
OUT1
= 5V, V+ = 12V (Note 4)
V
OUT2
= 3.3V, V+ = 12V (Note 4)
V
EN1
= V
EN2
= 0V, V
DRAIN_
= 19V,
V
SOURCE_
= 0V
I
LSSW
= 30mA
22
MIN
TYP
280
mΩ
300
2
1
520
A
A
MAX
UNITS
R
ON2
Minimum Converter 1 Output
Current
Minimum Converter 2 Output
Current
Converter 1/Converter 2
MOSFET DRAIN_ Leakage
Current
Internal Weak Low-Side Switch
On-Resistance
I
OUT1
I
OUT2
I
LK12
20
µA
R
ONLSSW_
Ω
INTERNAL SWITCH CURRENT LIMIT
Internal Switch Current-Limit
Converter 1
Internal Switch Current-Limit
Converter 2
SWITCHING FREQUENCY
PWM Maximum Duty Cycle
Switching Frequency Range
Switching Frequency
Switching Frequency Accuracy
D
MAX
f
SW
f
SW
R
OSC
= 6.81kΩ, each converter
(FSEL_1 = V
L
)
5.6kΩ < R
OSC
< 10kΩ, 1%
10kΩ < R
OSC
< 62.5kΩ, 1%
SYNC input frequency is twice the
individual converter frequency,
FSEL_1 = V
L
(see the
Setting the
Switching Frequency
section)
SYNC = SGND, f
SW
= 1.25MHz
82
200
1.7
1.9
5
7
90
95
2200
2.1
%
kHz
MHz
%
I
CL1
I
CL2
V+ = V
IN_HIGH
= 5.2V, V
L
= VDRV =
V
BST_/VDD_
= 5.2V
V+ = V
IN_HIGH
= 5.2V, V
L
= VDRV =
V
BST_/VDD_
= 5.2V
2.8
1.75
3.45
2.1
4.3
2.6
A
A
SYNC Frequency Range
f
SYNC
400
4400
kHz
SYNC High Threshold
SYNC Low Threshold
SYNC Input Leakage
SYNC Input Minimum Pulse
Width
Clock Output Phase Delay
SYNC to Source 1 Phase Delay
Clock Output High Level
Clock Output Low Level
V
SYNCH
V
SYNCL
I
SYNC_LEAK
t
SYNCIN
CKO
PHASE
SYNC
PHASE
V
CKOH
V
CKOL
R
OSC
= 62.5kΩ, with respect to converter
2/SOURCE2 waveform
R
OSC
= 62.5kΩ
V
L
= 5.2V, sourcing 5mA
V
L
= 5.2V, sinking 5mA
2
0.8
2
100
40
90
3.6
0.6
V
V
µA
ns
Degrees
Degrees
V
V
4
_______________________________________________________________________________________
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
ELECTRICAL CHARACTERISTICS (continued)
(VDRV = V
L
, V+ = V
L
= IN_HIGH = 5.2V or V+ = IN_HIGH = 5.2V to 19V, EN_ = V
L
, SYNC = GND, I
VL
= 0mA, PGND_ = SGND,
C
BYPASS
= 0.22µF (low ESR), C
VL
= 4.7µF (ceramic), C
V+
= 1µF (low ESR), C
IN_HIGH
= 1µF (ceramic), R
IN_HIGH
= 3.9kΩ, R
OSC
= 10kΩ,
T
J
= -40°C to +125°C, unless otherwise noted.) (Note 2)
PARAMETER
FSEL_1
FSEL_1 Input High Threshold
FSEL_1 Input Low Threshold
FSEL_1 Input Leakage
ON/OFF
ON/OFF Input High Threshold
ON/OFF Input Low Threshold
ON/OFF Input Leakage Current
EN_ INPUTS
EN_ Input High Threshold
EN_ Input Hysteresis
EN_ Input Leakage Current
PGOOD_ Threshold
PGOOD_ Output Voltage
PGOOD_ Output Leakage
Current
FB_ OVP Threshold Rising
FB_ OVP Threshold Falling
THERMAL PROTECTION
Thermal Shutdown
Thermal Hysteresis
T
SHDN
T
HYST
Rising
+165
20
°C
°C
V
IH
V
EN_HYS
I
EN_LEAK
V
TPGOOD_
V
PGOOD_
I
LKPGOOD_
Falling
I
SINK
= 3mA
V+ = V
L
= V
IN_HIGH
= V
EN_
= 5.2V,
V
PGOOD_
= 23V, V
FB_
= 1V
107
114
12.5
-1
90
92.5
EN_ rising
1.9
2.0
0.5
+1
95
0.4
2
2.1
V
V
µA
% V
FB_
V
µA
V
IH
V
IL
I
ON/OFF_LEAK
V
ON/OFF
= 5V
0.26
2
0.8
2.00
V
V
µA
V
IH
V
IL
I
FSEL_1_LEAK
2
0.8
2
V
V
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5098A
POWER-GOOD OUTPUT (PGOOD1, PGOOD2)
OUTPUT OVERVOLTAGE PROTECTION
V
OVP_R
V
OVP_F
121
% V
FB_
V
Note 2:
100% tested at T
A
= +25°C and T
A
= +125°C. Specifications at T
A
= -40°C are guaranteed by design and not production
tested.
Note 3:
Operating supply range (V+) is guaranteed by V
L
line regulation test. Connect V+ to IN_HIGH and V
L
for 5V operation.
Note 4:
Output current is limited by the power dissipation of the package; see the
Power Dissipation
section in the
Applications
Information
section.
_______________________________________________________________________________________
5
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