The SiP2213 is a dual output low dropout regulator capable
of supplying 150 mA from output 1 and 300 mA from output
2. In the SiP2213, the outputs are sequenced at power on.
The output of LDO #1 has to settle before the output of LDO
#2 begins turning on. In addition to the LDOs, an open drain
output has been included, which is capable of sinking
150 mA. The SiP2213 offers a low dropout, low ground
current and extremely low noise with the addition of a bypass
capacitor.
Protection features include POR with adjustable delay,
undervoltage lockout, output current limit, and thermal
shutdown.
The fixed output version of SiP2213 is available in the
MLP33-10 PowerPAK package and the adjustable version is
available in the MLP44-16 PowerPAK package. Both
packages are specified to operate over the range of - 40 °C
to 85 °C.
FEATURES
•
•
•
•
•
•
•
•
2.25 V to 5.5 V input voltage range
Two outputs - 150 mA and 300 mA
Low ground current
Open drain driver output
POR
Current limit
Thermal shutdown
MLP33-10 and MLP44-16 PowerPAK
®
packages
APPLICATIONS
• Cellular phones
• Wireless modems
• PDAs
TYPICAL APPLICATION CIRCUIT
V
IN
EN
SW
V
IN
EN
SW
BP
SET
GND
V
OUT1
V
OUT2
V
OUT1
V
OUT2
POR
SiP2213
POR
DRV
GND
Document Number: 73190
S09-1455-Rev. E, 03-Aug-09
www.vishay.com
1
SiP2213
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
V
IN
, V
EN
, to GND
Power Dissipation
Storage Temperature
Thermal Resistance
MLP33-10 PowerPAK
a
MLP44-16 PowerPAK
a
Limit
- 0.3 to 7
MLP33-10 PowerPAK
b
MLP44-16
PowerPAK
c
1600
1880
- 55 to 150
50
43
Unit
V
mW
°C
°C/W
Notes:
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 20 mW/°C above 70 °C.
c. Derate 23.5 mW/°C above 70 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Input Voltage Range
Enable Voltage Range
Operating Temperature Range T
A
Operating Temperature Range T
J
Limit
2.25 to 5.5
0 to 5.5
- 40 to 85
- 40 to 125
Unit
V
°C
SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= V
OUT
+ 1 V
f
, C
OUT
= 1 µF, I
OUT
= 100 µA
T
A
= 25 °C
From Nominal V
OUT
Limits
Temp.
a
Room
Full
Room
V
IN
= V
OUT
+ 1 V to 5.5 V
I
OUT
= 100 µA to 150 mA (LDO 1 and 2)
I
OUT
= 100 µA to 300 mA (LDO 2)
I
OUT
= 150 mA (LDO 1 and 2)
Dropout Voltage
g
V
DROP
I
OUT
= 300 mA (LDO 2)
I
OUT1
= I
OUT2
= 0 µA
I
OUT1
= I
OUT2
= 0 µA
I
OUT1
= 150 mA, I
OUT2
= 300 mA
V
EN
< 0.4 V
C
BP
= 0.01 µF
f = 1 kHz, C
OUT
= 1 µF, C
BP
= 10 nF
f = 20 kHz, C
OUT
= 1 µF, C
BP
= 10 nF
V
IL
V
IH
I
IL
I
IH
V
TH
(set)
Logic Low
Logic High
V
IL
< 0.6 V
V
IH
> 1.8 V
POR = High
V
SET
= 0 V
Room
Full
Room
Room
Room
Full
Room
Full
Room
Full
Room
Full
Room
Room
Room
Full
Full
Room
Room
Room
Room
- 0.3
- 0.6
Min.
b
-1
-2
40
0.2
0.2
120
240
48
60
2.0
70
30
60
40
0.6
1.8
-1
-1
0.75
0.01
0.01
1.25
1.25
1
1
1.75
µs
µVrms
dB
0.3
0.6
1.0
1.5
190
250
340
420
65
80
Typ.
c
Max.
b
1
2
Unit
Parameter
Regulators
Output Voltage Accuracy
Output Voltage
Temperature Coefficient
Line Regulation
f
Load Regulation
Symbol
%
ppm/°C
%
mV
Ground Pin Current
I
G
µA
Sequence Time Delay
Output Voltage Noise
Ripple Rejection
Inputs
EN, SW Input Voltage
EN, SW Input Current
d
t
SEQ
V
µA
V
µA
SET Pin Threshold Voltage
SET Pin Current Source
www.vishay.com
2
Document Number: 73190
S09-1455-Rev. E, 03-Aug-09
SiP2213
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= V
OUT
+ 1
Parameter
Power On Reset (POR) Output
Threshold
Output Voltage
Leakage Current
Driver (DRV) Output
Output Voltage
Leakage Current
Protection
Current Limit
Thermal Shutdown Temperature
Thermal Hysteresis
I
IL
V
OUT1
= 0 V
V
OUT2
= 0 V
Room
Room
Room
Room
150
300
280
450
165
25
460
700
mA
°C
V
OL
I
L
= 150 mA
I
DRV
= 0 mA, V
DRV
= 5.5 V, SW = 0 V
Full
Room
-1
0.2
0.01
0.6
1
V
µA
V
THL
V
THH
V
OL
I
ERR
% of Nominal V
OUT2
I
L
= 250 µA
ERR = High
Room
Room
Room
Room
-1
0.02
0.01
90
96
0.1
1
%
V
µA
Symbol
V
e
,
C
OUT
= 1 µF, I
OUT
= 100 µA,
T
A
= 25 °C
Temp.
a
Min.
b
Limits
Typ.
c
Max.
b
Unit
Notes:
a. Room = 25 °C, Full = - 40 °C to 85 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Timing is measured from 90 % of LDO #1’s final value to 90 % of LDO #2’s final value.
e. Guaranteed by design.
f. For higher output of the regulator pair.
g. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 % below the output voltage measured
with a 1 V differential, provided that V
IN
does not drop below 2.25 V. When V
OUT(nom)
is less than 2.25 V, the output will be in regulation when
2.25 V - V
OUT(nom)
is greater than the dropout voltage specified.
Document Number: 73190
S09-1455-Rev. E, 03-Aug-09
www.vishay.com
3
SiP2213
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
V
IN
EN
LDO #1
V
OUT1
LDO #2
V
OUT2
SET
BP
Reference
POR
DLY
POR
DRV
SW
SW
LOGIC
GND
GND
SW
Fixed Voltage Version
V
IN
EN
1
LDO #1
V
OUT1
ADJ
1
LDO #2
V
OUT2
ADJ
2
POR
DLY
POR
SET
BP
Reference
DRV
SW
SW
LOGIC
GND
GND
SW
Adjustable Voltage Version
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4
Document Number: 73190
S09-1455-Rev. E, 03-Aug-09
SiP2213
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
PowerPAK MLP33-10 with Large Pad
VOLTAGE OPTIONS
Voltage
Code (x, z)
A
F
W
G
Y
H
E
J
K
L
M
N
O
P
Q
R
S
T
U
V
Adj
V
IN
EN
BP
SW
SET
1
2
3
4
5
10
9
8
7
6
V
OUT1
V
OUT1
V
OUT2
V
OUT2
POR
DRV
GND
ERR
DRV
GND
10
9
8
7
6
1
2
3
4
5
V
IN
EN
1
EN
2
BP
SW
1.5
1.6
1.8
1.9
2.0
2.1
2.5
2.6
2.7
2.8
2.85
2.9
3.0
Top View
V
OUT1
V
OUT2
Bottom View
Exposed Pad
V
IN
15
13
14
16
POR
DRV
ADJ
2
GND
SW
12
11
10
9
8
GND
7
GND
6
SET
5
SW
V
IN
1
2
3
4
EN
1
NC
BP
ADJ
1
3.1
3.2
3.3
3.4
3.5
3.6
ORDERING INFORMATION
Part Number
SiP2213DMP-XZ-T1
- 40 °C to 85 °C
SiP2213DLP-AA-T1
X: Output 1 voltage code.
Z: Output 2 voltage code.
Temp. Range
Package
PowerPAK
MLP33-10
PowerPAK
MLP44-16
Marking
13XZ
13AA
Bottom View
PIN DESCRIPTION
Pin Number
MLP33-10
1
2
1
2
3
4
5
6
3
5
4
6
7, 8
9
10
7
8
9
10
11
12
13
14
MLP44-16
15, 16
Name
V
IN
EN
EN
NC
BP
SW
ADJ
1
SET
GND
GND
SW
ADJ
2
DRV
POR
V
OUT2
V
OUT1
Function
Input voltage for the power MOSFETs and their gate drive
Enables LDO outputs.
Enables LDO outputs.
No Connect
Bypass for noise reduction
Control for open drain output
Feedback connection for LDO #1
Connection for external capacitor to delay POR
Ground
Ground for the internal N-channel MOSFET switch
Feedback connection for LDO #2
Open drain output
Power on reset output
Output of LDO #2 - 300 mA
Output of LDO #1 - 150 mA
The exposed pad on both packages must be connected externally to the GND pin.
FPGA/CPLD
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