A
PPLICATION
N
OTES AND
D
EVELOPMENT
S
YSTEM
A V A I L A B L E
AN99 • AN115 • AN124 •AN133 • AN134 • AN135
Single Supply / Low Power / 256-tap / SPI bus
X9251
Quad Digitally-Controlled (XDCP
TM
) Potentiometer
FEATURES
• Four potentiometers in one package
• 256 resistor taps–0.4% resolution
• SPI Serial Interface for write, read, and transfer
operations of the potentiometer
• Wiper resistance: 100
Ω
typical @ V
CC
= 5V
• 4 Non-volatile data registers for each
potentiometer
• Non-volatile storage of multiple wiper positions
• Standby current < 5µA max
• V
CC
: 2.7V to 5.5V Operation
• 50K
Ω
, 100K
Ω
versions of total resistance
• 100 yr. data retention
• Single supply version of X9250
• Endurance: 100,000 data changes per bit per
register
• 24-lead SOIC, 24-lead TSSOP, 24-lead CSP
(Chip Scale Package)
• Low power CMOS
DESCRIPTION
The X9251 integrates four digitally controlled potentio-
meters (XDCP) on a monolithic CMOS integrated
circuit.
The digitally controlled potentiometers are imple-
mented with a combination of resistor elements and
CMOS switches. The position of the wipers are
controlled by the user through the SPI bus interface.
Each potentiometer has associated with it a volatile
Wiper Counter Register (WCR) and four non-volatile
Data Registers that can be directly written to and read
by the user. The content of the WCR controls the
position of the wiper. At power-up, the device recalls
the content of the default Data Registers of each DCP
(DR00, DR10, DR20, and DR30) to the corresponding
WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
FUNCTIONAL DIAGRAM
V
CC
R
H0
R
H1
R
H2
R
H3
HOLD
A1
A0
SO
SI
SCK
CS
SPI
Interface
WCR0
DR00
DR01
DR02
DR03
DCP0
POWER UP,
INTERFACE
CONTROL
AND
STATUS
WCR1
DR10
DR11
DR12
DR13
DCP1
WCR2
DR20
DR21
DR22
DR23
DCP2
WCR3
DR30
DR31
DR32
DR33
DCP3
V
SS
WP
R
W0
R
L0
R
W1
R
L1
R
W2
R
L2
R
W3
R
L3
REV 1.3.3 2/10/04
www.xicor.com
Characteristics subject to change without notice.
1 of 25
X9251
ORDERING INFO
Ordering
Number
X9251US24
X9251US24-2.7
X9251US24I
X9251US24I-2.7
X9251UV24
X9251UV24-2.7
X9251UV24I
X9251UV24I-2.7
X9251UB24
X9251UB24-2.7
X9251UB24I
X9251UB24I-2.7
X9251TS24
X9251TS24-2.7
X9251TS24I
X9251TS24I-2.7
X9251TV24
X9251TV24-2.7
X9251TV24I
X9251TV24I-2.7
X9251TB24
X9251TB24-2.7
X9251TB24I
X9251TB24I-2.7
Potentiomenter
Organization
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
50k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
100k
Ω
Package
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead TSSOP
24-lead TSSOP
24-lead TSSOP
24-lead TSSOP
24-lead CSP
24-lead CSP
24-lead CSP
24-lead CSP
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead TSSOP
24-lead TSSOP
24-lead TSSOP
24-lead TSSOP
24-lead CSP
24-lead CSP
24-lead CSP
24-lead CSP
Operating
Temperature
Range
0°C to 70°C
0°C to 70°C
-40°C to +85°C
-40°C to +85°C
0°C to 70°C
0°C to 70°C
-40°C to +85°C
-40°C to +85°C
0°C to 70°C
0°C to 70°C
-40°C to +85°C
-40°C to +85°C
0°C to 70°C
0°C to 70°C
-40°C to +85°C
-40°C to +85°C
0°C to 70°C
0°C to 70°C
-40°C to +85°C
-40°C to +85°C
0°C to 70°C
0°C to 70°C
-40°C to +85°C
-40°C to +85°C
V
CC
Limits
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
5V±10%
2.7 to 5.5V
REV 1.3.3 2/10/04
www.xicor.com
Characteristics subject to change without notice.
2 of 25
X9251
CIRCUIT LEVEL APPLICATIONS
• Vary the gain of a voltage amplifier
• Provide programmable dc reference voltages for
comparators and detectors
• Control the volume in audio circuits
• Trim out the offset voltage error in a voltage amplifier
circuit
• Set the output voltage of a voltage regulator
• Trim the resistance in Wheatstone bridge circuits
• Control the gain, characteristic frequency and
Q-factor in filter circuits
• Set the scale factor and zero point in sensor signal
conditioning circuits
• Vary the frequency and duty cycle of timer ICs
• Vary the dc biasing of a pin diode attenuator in RF
circuits
• Provide a control variable (I, V, or R) in feedback
circuits
SYSTEM LEVEL APPLICATIONS
• Adjust the contrast in LCD displays
• Control the power level of LED transmitters in
communication systems
• Set and regulate the DC biasing point in an RF power
amplifier in wireless systems
• Control the gain in audio and home entertainment
systems
• Provide the variable DC bias for tuners in RF wireless
systems
• Set the operating points in temperature control
systems
• Control the operating point for sensors in industrial
systems
• Trim offset and gain errors in artificial intelligent
systems
REV 1.3.3 2/10/04
www.xicor.com
Characteristics subject to change without notice.
3 of 25
X9251
PIN CONFIGURATION
CSP
SOIC/TSSOP
SO
A0
R
W3
R
H3
R
L3
NC
V
CC
R
L0
R
H0
R
W0
CS
WP
1
2
3
4
5
6
7
8
9
10
11
12
X9251
24
23
22
21
20
19
18
17
16
15
14
13
HOLD
SCK
R
L2
R
H2
R
W2
NC
V
SS
R
W1
R
H1
R
L1
A1
SI
F
Top View–Bumps Down
E
R
W3
A
0
SCK
R
L2
A
1
R
W0
R
L0
V
CC
C
NC
D
R
L3
SO
HOLD
R
W2
R
H3
R
H2
NC
2
CS
WP
R
H0
3
A
1
SI
R
H1
4
R
L1
R
W1
V
SS
B
PIN ASSIGNMENTS
Pin
(SOIC)
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
17
18
20
21
22
23
24
6, 19
Pin
(CSP)
E2
F2
F1
D2
E1
C1
B1
C2
A1
A2
B2
B3
A3
A4
C3
B4
C4
E4
D3
F4
F3
E3
D1, D4
Symbol
SO
A0
R
W3
R
H3
R
L3
V
CC
R
L0
R
H0
R
W0
CS
WP
SI
A1
R
L1
R
H1
R
W1
V
SS
R
W2
R
H2
R
L2
SCK
HOLD
NC
Function
Serial Data Output for SPI bus
Device Address for SPI bus. (See Note 1)
Wiper Terminal of DCP3
High Terminal of DCP3
Low Terminal of DCP3
System Supply Voltage
Low Terminal of DCP0
High Terminal of DCP0
Wiper Terminal of DCP0
SPI bus. Chip Select active low input
Hardware Write Protect – active low
Serial Data Input for SPI bus
Device Address for SPI bus. (See Note 1)
Low Terminal of DCP1
High Terminal of DCP1
Wiper Terminal of DCP1
System Ground
Wiper Terminal of DCP2
High Terminal of DCP2
Low Terminal of DCP2
Serial Clock for SPI bus
Device select. Pauses the SPI serial bus.
No Connect
Note 1:
A0–A1 device address pins must be tied to a logic level.
REV 1.3.3 2/10/04
www.xicor.com
Characteristics subject to change without notice.
4 of 25
X9251
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL
O
UTPUT
(SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
S
ERIAL
I
NPUT
(SI)
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the device
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
S
ERIAL
C
LOCK
(SCK)
The SCK input is used to clock data into and out of the
X9251.
H
OLD
(HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
D
EVICE
A
DDRESS
(A1–A0)
The address inputs are used to set the two least
significant bits of the slave address. A match in the
slave address serial data stream must be made with
the address input in order to initiate communication
with the X9251. Device pins A1-A0 must be tie to a
logic level which specify the internal address of the
device, see Figures 2, 3, 4, 5 and 6.
C
HIP
S
ELECT
(CS)
When CS is HIGH, the X9251 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device is in the standby
state. CS LOW enables the X9251, placing it in the
active power mode. It should be noted that after a
power-up, a HIGH to LOW transition on CS is required
prior to the start of any operation.
Potentiometer Pins
R
H
, R
L
The R
H
and R
L
pins are equivalent to the terminal
connections on a mechanical potentiometer. Since
there are 4 potentiometers, there are 4 sets of R
H
and
R
L
such that R
H0
and R
L0
are the terminals of DCP0
and so on.
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4
potentiometers, there are 4 sets of R
W
such that R
W0
is the terminals of DCP0 and so on.
Supply Pins
S
YSTEM
S
UPPLY
V
OLTAGE
(V
CC
)
AND
S
UPPLY
G
ROUND
(V
SS
)
The V
CC
pin is the system supply voltage. The V
SS
pin
is the system ground.
Other Pins
N
O
C
ONNECT
No connect pins should be left floating. This pins are
used for Xicor manufacturing and testing purposes.
H
ARDWARE
W
RITE
P
ROTECT
I
NPUT
(WP)
The WP pin when LOW prevents non-volatile writes to
the Data Registers.
REV 1.3.3 2/10/04
www.xicor.com
Characteristics subject to change without notice.
5 of 25
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