电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

HYS72D64020GR-7.5-A

产品描述DRAM
产品类别存储    存储   
文件大小236KB,共17页
制造商Infineon(英飞凌)
官网地址http://www.infineon.com/
下载文档 详细参数 选型对比 全文预览

HYS72D64020GR-7.5-A概述

DRAM

HYS72D64020GR-7.5-A规格参数

参数名称属性值
厂商名称Infineon(英飞凌)
包装说明,
Reach Compliance Codeunknown

文档预览

下载PDF文档
HYS 72Dxxx0GR
Registered DDR-I SDRAM-Modules
2.5 V 184-pin Registered DDR-I SDRAM Modules
256MB, 512MB & 1 GByte Modules
Preliminary Datasheet Rev. 0.98
• 184-pin Registered 8-Byte Dual-In-Line
DDR-I SDRAM Module for PC and Server
main memory applications
• One bank 32M
×
72, 64M x 72 and two bank
64M x 72, 128M
×
72 organization
• JEDEC standard Double Data Rate
Synchronous DRAMs (DDR-I SDRAM)
Single + 2.5 V (± 0.2 V) power supply
• Built with 256Mbit DDR-I SDRAMs in 66-
Lead TSOPII package
• Programmable CAS Latency, Burst Length,
and Wrap Sequence (Sequential &
Interleave)
• Performance:
-7
Component Speed Grade
Module Speed Grade
f
CK
f
CK
• Auto Refresh (CBR) and Self Refresh
• All inputs and outputs SSTL_2 compatible
• Re-drive for all input signals using register
and PLL devices.
• Serial Presence Detect with E
2
PROM
• Jedec standard MO-161 form factor:
133.35 mm
×
43.18 mm
×
4.00 mm
(8.00 mm when stacked)
• Jedec standard reference layout:
Rev 0.95 of R/C A, R/C B and R/C C
• Gold plated contacts
-7.5
PC2100
133
100
-8
PC1600
125
100
Unit
DDR266A DDR266B DDR200
PC2100
143
133
MHz
MHz
Clock Frequency (max.) @ CL = 2.5
Clock Frequency (max.) @ CL = 2
The HYS 72Dxx000GR are industry standard 184-pin 8-byte Dual in-line Memory Modules (DIMMs)
organized as 32M
×
72, 64M
×
72 and 128M
×
72. The memory array is designed with Double Data
Rate Synchronous DRAMs (2.5V DDR-I) for ECC applications. All control and address signals are
re-driven on the DIMM using register devices and a PLL for the clock distribution. This reduces
capacitive loading to the system bus, but adds one cycle to the SDRAM timing. A variety of
decoupling capacitors are mounted on the PC board. The DIMMs feature serial presence detect
based on a serial E
2
PROM device using the 2-pin I
2
C protocol. The first 128 bytes are programmed
with configuration data and the second 128 bytes are available to the customer.
Target Datasheet
1
11.00

HYS72D64020GR-7.5-A相似产品对比

HYS72D64020GR-7.5-A HYS72D32000GR-7.5-A HYS72D64000GR-7.5-B
描述 DRAM DRAM DRAM
Reach Compliance Code unknown unknown unknown
Is Samacsys - N N
Base Number Matches - 1 1

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1282  1825  2741  827  2423  36  43  29  35  54 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved