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HYS72V8300GU-8-C

产品描述Synchronous DRAM Module, 8MX72, 6ns, CMOS, DIM-168
产品类别存储    存储   
文件大小142KB,共23页
制造商Infineon(英飞凌)
官网地址http://www.infineon.com/
下载文档 详细参数 全文预览

HYS72V8300GU-8-C概述

Synchronous DRAM Module, 8MX72, 6ns, CMOS, DIM-168

HYS72V8300GU-8-C规格参数

参数名称属性值
厂商名称Infineon(英飞凌)
零件包装代码DIMM
包装说明,
针数168
Reach Compliance Codeunknown
ECCN代码EAR99
访问模式SINGLE BANK PAGE BURST
最长访问时间6 ns
其他特性AUTO/SELF REFRESH
JESD-30 代码R-XDMA-N168
内存密度603979776 bit
内存集成电路类型SYNCHRONOUS DRAM MODULE
内存宽度72
功能数量1
端口数量1
端子数量168
字数8388608 words
字数代码8000000
工作模式SYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织8MX72
封装主体材料UNSPECIFIED
封装形状RECTANGULAR
封装形式MICROELECTRONIC ASSEMBLY
认证状态Not Qualified
自我刷新YES
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)3.3 V
表面贴装NO
技术CMOS
温度等级COMMERCIAL
端子形式NO LEAD
端子位置DUAL

文档预览

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HYS 64/72V8300/16220GU
SDRAM-Modules
3.3 V 8M
×
64/72-Bit 1 Bank SDRAM Module
3.3 V 16M
×
64/72-Bit 2 Bank SDRAM Module
168-Pin Unbuffered DIMM Modules
• 168-Pin unbuffered 8-Byte Dual-In-Line
SDRAM Modules for PC main memory
applications
• PC100 and PC133 versions
• 1 bank 8M
×
64, 8M
×
72 and 2 bank
16M
×
64, 16M
×
72 organzation
• Optimized for byte-write non-parity (x64) or
ECC (x72) applications
• JEDEC standard Synchronous DRAMs
(SDRAM)
• Fully PC board layout compatible to INTEL’s
Rev. 1.0 Module Specification
• SDRAM Performance:
-7.5
PC133
f
CK
Clock
• Programmed Latencies:
Product Speed
-7.5
-8
PC133
PC100
CL
3
2
t
RCD
t
RP
3
2
3
2
• Single +3.3 V(±0.3 V) Power Supply
• Programmable CAS Latency, Burst Length,
and Wrap Sequence
(Sequential and Interleave)
• Auto-Refresh (CBR) and Self-Refresh
• Decoupling capacitors mounted on substrate
• All inputs and outputs are LVTTL compatible
• Serial Presence Detect with E
2
PROM
-8
PC100
100
Unit
MHz
133
• Utilizes 8M
×
8 SDRAMs in TSOPII-54
packages with 4096 refresh cycles every
64 ms
• 133.35 mm
×
31.75 mm
×
4,00 mm card size
with gold-contact pads
Frequency
(max.)
t
AC
Clock Access
5.4
6
ns
Time
The HYS 64(72)V8300GU and HYS 64(72)V16220GU are industry-standard 168-pin 8-byte Dual
In-line Memory Modules (DIMMs) which are organized as 8M
×
64, 8M
×
72 in 1 bank and 16M
×
64
and 16M
×
72 in two banks of high-speed memory arrays designed with 64M Synchronous DRAMs
(SDRAMs) for non-parity and ECC applications. The DIMMs use -7.5 speed sorted 8M
×
8 SDRAM
devices in TSOP54 packages to meet the PC133-333 requirements and use -8 components for the
standard PC100-222 applications. Decoupling capacitors are mounted on the PC board. The PC
board design is in accordance with INTEL’s PC SDRAM Rev. 1.0 Module Specification. The DIMMs
have Serial Presence Detect, implemented with a serial E
2
PROM using the two-pin I
2
C protocol.
The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available
to the end user. All INFINEON 168-pin DIMMs provide a high performance, flexible 8-byte interface
in a 133.35 mm long footprint, with 1.25“ (31.75 mm) height.
Data Book
1
12.99

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