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IDT74ALVCH162601PV8

产品描述Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56
产品类别逻辑    逻辑   
文件大小76KB,共7页
制造商IDT (Integrated Device Technology)
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IDT74ALVCH162601PV8概述

Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56

IDT74ALVCH162601PV8规格参数

参数名称属性值
厂商名称IDT (Integrated Device Technology)
零件包装代码SSOP
包装说明SSOP,
针数56
Reach Compliance Codeunknown
其他特性WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列ALVC/VCX/A
JESD-30 代码R-PDSO-G56
JESD-609代码e0
长度18.415 mm
逻辑集成电路类型REGISTERED BUS TRANSCEIVER
位数18
功能数量1
端口数量2
端子数量56
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE WITH SERIES RESISTOR
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd)6.3 ns
认证状态Not Qualified
座面最大高度2.794 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2.7 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层TIN LEAD
端子形式GULL WING
端子节距0.635 mm
端子位置DUAL
宽度7.5 mm

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IDT74ALVCH162601
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT UNIVERSAL
IDT74ALVCH162601
BUS TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical t
SK(o)
(Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• V
CC
= 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
µ
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
DESCRIPTION:
This 18-bit universal bus transceiver is built using advanced dual metal
CMOS technology. The ALVCH162601 combines D-type latchesand D-type
flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled
modes.
Data flow in each direction is controlled by output-enable (OEAB and
OEBA),
latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The
clock can be controlled by the clock-enable (CLKENAB and
CLKENBA)
inputs.
For A-to-B data flow, the device operates in the transparent mode when LEAB
is high. When LEAB is low, the A data is latched if CLKAB is held at a high or
low logic level. If LEAB is low, the data is stored in the latch/flip-flop on the low-
to-high transition of CLKAB. When
OEAB
is low, the outputs are active. When
OEAB
is high, the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA,
LEBA, CLKBA
and
CLKENBA.
The ALVCH162601 has series resistors in the device output structure of the
“B” port which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold levels.
The “A” port has a ±24mA driver.
The ALVCH162601 has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs and
eliminates the need for pull-up/down resistors.
DRIVE FEATURES:
• High Output Drivers: ±24mA (A port)
• Balanced Output Drivers: ±12mA (B port)
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
OEAB
CLKENAB
55
1
56
CLKAB
LEAB
LEBA
CLKBA
CLKENBA
OEBA
A
1
2
28
30
29
27
CE
3
1D
C1
CLK
54
B
1
CE
1D
C1
CLK
TO 17 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4733/1

IDT74ALVCH162601PV8相似产品对比

IDT74ALVCH162601PV8 IDT74ALVCH162601PF8 IDT74ALVCH162601PA8
描述 Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56 Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56 Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56
零件包装代码 SSOP SSOP TSSOP
包装说明 SSOP, TSSOP, TSSOP,
针数 56 56 56
Reach Compliance Code unknown unknown unknown
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) -
其他特性 WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION - WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列 ALVC/VCX/A - ALVC/VCX/A
JESD-30 代码 R-PDSO-G56 - R-PDSO-G56
JESD-609代码 e0 - e0
长度 18.415 mm - 14 mm
逻辑集成电路类型 REGISTERED BUS TRANSCEIVER - REGISTERED BUS TRANSCEIVER
位数 18 - 18
功能数量 1 - 1
端口数量 2 - 2
端子数量 56 - 56
最高工作温度 85 °C - 85 °C
最低工作温度 -40 °C - -40 °C
输出特性 3-STATE WITH SERIES RESISTOR - 3-STATE WITH SERIES RESISTOR
输出极性 TRUE - TRUE
封装主体材料 PLASTIC/EPOXY - PLASTIC/EPOXY
封装代码 SSOP - TSSOP
封装形状 RECTANGULAR - RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd) 6.3 ns - 6.3 ns
认证状态 Not Qualified - Not Qualified
座面最大高度 2.794 mm - 1.2 mm
最大供电电压 (Vsup) 3.6 V - 3.6 V
最小供电电压 (Vsup) 2.7 V - 2.7 V
标称供电电压 (Vsup) 3.3 V - 3.3 V
表面贴装 YES - YES
技术 CMOS - CMOS
温度等级 INDUSTRIAL - INDUSTRIAL
端子面层 TIN LEAD - TIN LEAD
端子形式 GULL WING - GULL WING
端子节距 0.635 mm - 0.5 mm
端子位置 DUAL - DUAL
宽度 7.5 mm - 6.1 mm
Base Number Matches - 1 1

 
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