HD74HC155
Dual 2-to-4-line Decoders/Demultiplexers
ADE-205-453 (Z)
1st. Edition
Sep. 2000
Description
This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address
input. When both sections are enabled by the strobes, the common binary-address inputs sequentially
select and route associated input data to the appropriate output of each section. The individual strobes
permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted
through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-
line demultiplexer without external gating.
Features
•
High Speed Operation: t
pd
(A or B to Y) = 15 ns typ (C
L
= 50 pF)
•
High Output Current: Fanout of 10 LSTTL Loads
•
Wide Operating Voltage: V
CC
= 2 to 6 V
•
Low Input Current: 1 µA max
•
Low Quiescent Supply Current: I
CC
(static) = 4 µA max (Ta = 25°C)
Function Table
2-line-to-4-line Decoder/1-line-to-4-line Demultiplexer
Inputs
Select
B
X
L
L
H
H
X
A
X
L
H
L
H
X
Strobe
1G
H
L
L
L
L
X
Data
1C
X
H
H
H
H
L
Outputs
1Y
0
H
L
H
H
H
H
1Y
1
H
H
L
H
H
H
1Y
2
H
H
H
L
H
H
1Y
3
H
H
H
H
L
H
HD74HC155
Inputs
Select
B
X
L
L
H
H
X
A
X
L
H
L
H
X
Strobe
2G
H
L
L
L
L
X
Data
2C
X
L
L
L
L
H
Outputs
2Y
0
H
L
H
H
H
H
2Y
1
H
H
L
H
H
H
2Y
2
H
H
H
L
H
H
2Y
3
H
H
H
H
L
H
3-line-to-8-line Decoder/1-line-to-8-line Demultiplexer
Inputs
Select
C
X
L
L
L
L
H
H
H
H
B
X
L
L
H
H
L
L
H
H
A
X
L
H
L
H
L
H
L
H
Strobe Data
G
H
L
L
L
L
L
L
L
L
Outputs
0
2Y
0
H
L
H
H
H
H
H
H
H
1
2Y
1
H
H
L
H
H
H
H
H
H
2
2Y
2
H
H
H
L
H
H
H
H
H
3
2Y
3
H
H
H
H
L
H
H
H
H
4
1Y
0
H
H
H
H
H
L
H
H
H
5
1Y
1
H
H
H
H
H
H
L
H
H
6
1Y
2
H
H
H
H
H
H
H
L
H
7
1Y
3
H
H
H
H
H
H
H
H
L
Notes: 1. C: inputs 1C and 2C connected together
2. G: inputs 1G and 2G connected together
3. X: irrelevant
2
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