LTC6994-1/LTC6994-2
TimerBlox: Delay Block/
Debouncer
FEATURES
n
n
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DESCRIPTION
The LTC
®
6994 is a programmable delay block with a
range of 1µs to 33.6 seconds. The LTC6994 is part of the
TimerBlox™ family of versatile silicon timing devices.
A single resistor, R
SET
, programs an internal master os-
cillator frequency, setting the LTC6994’s time base. The
input-to-output delay is determined by this master oscil-
lator and an internal clock divider, N
DIV
, programmable to
eight settings from 1 to 2
21
:
t
DELAY
=
N
DIV
•R
SET
• 1µs, N
DIV
= 1, 8, 64,...,2
21
50kΩ
n
n
n
n
n
n
n
Delay Range: 1µs to 33.6 Seconds
Configured with 1 to 3 Resistors
Delay Max Error:
– <2.3% for Delay > 512µs
– <3.4% for Delay of 8µs to 512µs
– <5.1% for Delay of 1µs to 8µs
Delay One or Both Rising/Falling Edges
2.25V to 5.5V Single Supply Operation
70µA Supply Current at 10µs Delay
500µs Start-Up Time
CMOS Output Driver Sources/Sinks 20mA
–40°C to 125°C Operating Temperature Range
Available in Low Profile (1mm) SOT-23 (ThinSOT™)
and 2mm
×
3mm DFN
APPLICATIONS
n
n
n
n
n
The output (OUT) follows the input (IN) after delaying the
rising and/or falling transitions. The LTC6994-1 will delay
the rising or falling edge. The LTC6994-2 will delay both
transitions, and adds the option to invert the output.
DEVICE
LTC6994-1
LTC6994-2
DELAY FUNCTION
or
or
Noise Discriminators/Pulse Qualifiers
Delay Matching
Switch Debouncing
High Vibration, High Acceleration Environments
Portable and Battery-Powered Equipment
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
TimerBlox and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
The LTC6994 also offers the ability to dynamically adjust
the delay time via a separate control voltage.
The LTC6994 is available in the 6-lead SOT-23 (ThinSOT)
and 6-lead 2mm
×
3mm DFN packages.
TYPICAL APPLICATION
Noise Discriminator
NOISY
INPUT
IN
OUT
LTC6994-2
GND
V
+
0.1µF
R
SET
75k
SET
DIV
699412 TA01a
QUALIFIED
OUTPUT
3.3V
IN
2V/DIV
1.5µs
OUT
2V/DIV
20µs/DIV
699412 TA01b
1.5µs
699412f
1
LTC6994-1/LTC6994-2
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (V
+
) to GND ........................................6V
Maximum Voltage on Any Pin
.................................. (GND – 0.3V) ≤ V
PIN
≤ (V
+
+ 0.3V)
Operating Temperature Range (Note 2)
LTC6994C ............................................–40°C to 85°C
LTC6994I .............................................–40°C to 85°C
LTC6994H .......................................... –40°C to 125°C
Specified Temperature Range (Note 3)
LTC6994C ................................................ 0°C to 70°C
LTC6994I .............................................–40°C to 85°C
LTC6994H .......................................... –40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
S6 Package ....................................................... 300°C
PIN CONFIGURATION
TOP VIEW
V
+
1
DIV 2
SET 3
7
6 OUT
5 GND
4 IN
IN 1
GND 2
SET 3
TOP VIEW
6 OUT
5 V
+
4 DIV
DCB PACKAGE
6-LEAD (2mm
×
3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 64°C/W,
θ
JC
= 10.6°C/W
EXPOSED PAD (PIN 7) CONNECTED TO GND,
PCB CONNECTION OPTIONAL
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
T
JMAX
= 150°C,
θ
JA
= 192°C/W,
θ
JC
= 51°C/W
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
LTC6994IDCB-1#TRMPBF
TAPE AND REEL
LTC6994IDCB-1#TRPBF
PART MARKING
LFCT
LFCT
LFCT
LFCW
LFCW
LFCW
LTFCV
LTFCV
LTFCV
LTFCX
LTFCX
LTFCX
PACKAGE DESCRIPTION
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
LTC6994CDCB-1#TRMPBF LTC6994CDCB-1#TRPBF
LTC6994HDCB-1#TRMPBF LTC6994HDCB-1#TRPBF
LTC6994CDCB-2#TRMPBF LTC6994CDCB-2#TRPBF
LTC6994IDCB-2#TRMPBF
LTC6994CS6-1#TRMPBF
LTC6994IS6-1#TRMPBF
LTC6994HS6-1#TRMPBF
LTC6994CS6-2#TRMPBF
LTC6994IS6-2#TRMPBF
LTC6994HS6-2#TRMPBF
LTC6994IDCB-2#TRPBF
LTC6994CS6-1#TRPBF
LTC6994IS6-1#TRPBF
LTC6994HS6-1#TRPBF
LTC6994CS6-2#TRPBF
LTC6994IS6-2#TRPBF
LTC6994HS6-2#TRPBF
LTC6994HDCB-2#TRMPBF LTC6994HDCB-2#TRPBF
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
699412f
2
LTC6994-1/LTC6994-2
ELECTRICAL CHARACTERISTICS
SYMBOL
t
DELAY
∆t
DELAY
PARAMETER
Delay Time
Delay Accuracy (Note 4)
N
DIV
≥ 512
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, IN = 0V, DIVCODE = 0 to 15
(N
DIV
= 1 to 2
21
), R
SET
= 50k to 800k, R
LOAD
= 5k, C
LOAD
= 5pF unless otherwise noted.
CONDITIONS
MIN
1µ
±1.7
±2.4
l
TYP
MAX
33.55
±2.3
±3.0
±3.4
±4.4
±5.1
±6.2
UNITS
sec
%
%
%
%
%
%
%/°C
%/°C
%
%
8 ≤ N
DIV
≤ 64
N
DIV
= 1
l
±3.8
l
l
∆t
DELAY
/∆T
Delay Drift Over Temperature
Delay Change With Supply
N
DIV
≥ 512
N
DIV
≤ 64
N
DIV
≥ 512
8 ≤ N
DIV
≤ 64
V
+
= 4.5V to 5.5V
V
+
= 2.25V to 4.5V
V
+
= 4.5V to 5.5V
V
+
= 2.7V to 4.5V
V
+
= 2.25V to 2.7V
V
+
= 5.5V
V
+
= 2.25V
±0.006
±0.008
–0.6
–0.4
–0.9
–0.7
–1.1
–0.2
–0.1
–0.2
–0.2
–0.1
1.0
0.5
0.20
0.05
0.20
0.03
6 • t
MASTER
0.4
0.9
l
l
l
l
l
%
%
%
%
P-P
%
P-P
%
P-P
%
P-P
%
P-P
%
P-P
µs
Delay Jitter (Note 10)
N
DIV
= 1
N
DIV
= 8
N
DIV
= 64
N
DIV
= 512
N
DIV
= 4096
t
S
Power Supply
V
+
I
S(IDLE)
Delay Change Settling Time (Note 9)
Operating Supply Voltage Range
Power-On Reset Voltage
Supply Current (Idle)
t
MASTER
= t
DELAY
/N
DIV
l
l
2.25
165
125
135
105
70
60
65
55
0.97
50
0
1.00
±75
5.5
1.95
200
160
175
140
110
95
100
90
1.03
800
V
+
±1.5
±10
V
V
µA
µA
µA
µA
µA
µA
µA
µA
V
µV/°C
kΩ
V
%
nA
R
L
= ∞, R
SET
= 50k, N
DIV
≤ 64
R
L
= ∞, R
SET
= 50k, N
DIV
≥ 512
R
L
= ∞, R
SET
= 800k, N
DIV
≤ 64
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
l
l
l
l
l
l
l
l
R
L
= ∞, R
SET
= 800k, N
DIV
≥ 512 V
+
= 5.5V
V
+
= 2.25V
Analog Inputs
V
SET
∆V
SET
/∆T
R
SET
V
DIV
∆V
DIV
/∆V
+
Voltage at SET Pin
V
SET
Drift Over Temperature
Frequency-Setting Resistor
DIV Pin Voltage
DIV Pin Valid Code Range (Note 5)
DIV Pin Input Current
Deviation from Ideal
V
DIV
/V
+
= (DIVCODE + 0.5)/16
l
l
l
l
l
l
699412f
3
LTC6994-1/LTC6994-2
ELECTRICAL CHARACTERISTICS
SYMBOL
Digital I/O
IN Pin Input Capacitance
IN Pin Input Current
V
IH
V
IL
I
OUT(MAX)
V
OH
High Level IN Pin Input Voltage
Low Level IN Pin Input Voltage
Output Current
High Level Output Voltage (Note 7)
IN = 0V to V
+
(Note 6)
(Note 6)
V
+
= 2.7V to 5.5V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
OL
Low Level Output Voltage (Note 7)
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
t
PD
t
WIDTH
t
r
t
f
Propagation Delay
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
+
= 3.3V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
I
OUT
= –1mA
I
OUT
= –16mA
I
OUT
= –1mA
I
OUT
= –10mA
I
OUT
= –1mA
I
OUT
= –8mA
I
OUT
= 1mA
I
OUT
= 16mA
I
OUT
= 1mA
I
OUT
= 10mA
I
OUT
= 1mA
I
OUT
= 8mA
l
l
l
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, IN = 0V, DIVCODE = 0 to 15
(N
DIV
= 1 to 2
21
), R
SET
= 50k to 800k, R
LOAD
=
∞,
C
LOAD
= 5pF unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
2.5
±10
0.7 • V
+
0.3 • V
+
±20
5.45
4.84
3.24
2.75
2.17
1.58
5.48
5.15
3.27
2.99
2.21
1.88
0.02
0.26
0.03
0.22
0.03
0.26
10
14
24
5
1.1
1.7
2.7
1.0
1.6
2.4
0.04
0.54
0.05
0.46
0.07
0.54
MAX
UNITS
pF
nA
V
V
mA
V
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Minimum Recognized Input Pulse Width
Output Rise Time (Note 8)
Output Fall Time (Note 8)
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC6994C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 3:
The LTC6994C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6994C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but it is not tested or
QA sampled at these temperatures. The LTC6994I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6994H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 4:
Delay accuracy is defined as the deviation from the t
DELAY
equation, assuming R
SET
is used to program the delay.
Note 5:
See Operation section, Table 1 and Figure 2 for a full explanation
of how the DIV pin voltage selects the value of DIVCODE.
Note 6:
The IN pin has hysteresis to accommodate slow rising or falling
signals. The threshold voltages are proportional to V
+
. Typical values can
be estimated at any supply voltage using:
V
IN(RISING)
≈ 0.55 • V
+
+ 185mV and V
IN(FALLING)
≈ 0.48 • V
+
– 155mV
Note 7:
To conform to the Logic IC Standard, current out of a pin is
arbitrarily given a negative value.
Note 8:
Output rise and fall times are measured between the 10% and the
90% power supply levels with 5pF output load. These specifications are
based on characterization.
Note 9:
Settling time is the amount of time required for the output to settle
within ±1% of the final delay after a 0.5× or 2× change in I
SET
.
Note 10:
Jitter is the ratio of the deviation of the programmed delay to the
mean of the delay. This specification is based on characterization and is
not 100% tested.
699412f
4
LTC6994-1/LTC6994-2
V = 3.3V, R
SET
= 200k and T
A
= 25°C unless otherwise noted.
Delay Drift vs Temperature
(N
DIV
≤ 64)
1.5
1.0
0.5
DRIFT (%)
0
–0.5
–1.0
–1.5
–50 –25
DRIFT (%)
R
SET
= 50k
3 PARTS
1.5
1.0
0.5
DRIFT (%)
0
–0.5
–1.0
–1.5
–50 –25
TYPICAL PERFORMANCE CHARACTERISTICS
+
Delay Drift vs Temperature
(N
DIV
≤ 64)
R
SET
= 200k
3 PARTS
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–50 –25
Delay Drift vs Temperature
(N
DIV
≤ 64)
R
SET
= 800k
3 PARTS
50
25
75
0
TEMPERATURE (°C)
100
125
50
25
75
0
TEMPERATURE (°C)
100
125
50
25
75
0
TEMPERATURE (°C)
100
125
699412 G01
699412 G02
699412 G03
Delay Drift vs Temperature
(N
DIV
≥ 512)
1.5
1.0
0.5
DRIFT (%)
DRIFT (%)
0
–0.5
–1.0
–1.5
–50 –25
R
SET
= 50k
3 PARTS
1.5
1.0
0.5
0
–0.5
–1.0
Delay Drift vs Temperature
(N
DIV
≥ 512)
R
SET
= 200k
3 PARTS
1.5
1.0
0.5
DRIFT (%)
0
–0.5
–1.0
Delay Drift vs Temperature
(N
DIV
≥ 512)
R
SET
= 800k
3 PARTS
50
25
75
0
TEMPERATURE (°C)
100
125
–1.5
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
–1.5
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
699412 G04
699412 G05
699412 G06
Delay Drift vs Supply Voltage
(N
DIV
= 1)
1.0
0.8
0.6
0.4
DRIFT (%)
DRIFT (%)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
2
R
SET
= 50k
R
SET
= 200k
R
SET
= 800k
3
4
SUPPLY (V)
5
6
699412 G07
Delay Drift vs Supply Voltage
(N
DIV
= 1)
1.0
0.8
0.6
0.4
0
–0.2
–0.4
–0.6
–0.8
–1.0
2
R
SET
= 50k
R
SET
= 200k
R
SET
= 800k
3
4
SUPPLY (V)
5
6
699412 G08
Delay Drift vs Supply Voltage
(N
DIV
> 1)
1.0
0.8
0.6
0.4
DRIFT (%)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
2
R
SET
= 50k, N
DIV
= 8
R
SET
= 50k TO 800k, N
DIV
≥ 512
R
SET
= 800k, N
DIV
= 8
3
4
SUPPLY (V)
5
6
699412 G09
RISING EDGE DELAY
REFERENCED TO V
+
= 4V
FALLING EDGE DELAY
REFERENCED TO V
+
= 4V
REFERENCED TO V
+
= 4V
0.2
699412f
5
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