PT6554
LCD Driver IC
DESCRIPTION
PT6554 is a high performance Liquid Crystal Display
(LCD) Driver IC utilizing CMOS technology specially
designed with Key Input function. It can drive up to a
maximum of 164 segments and control up to 4 general
purpose output ports. It includes a Key Scan Circuit
that can support up to 30 key inputs and provides
On-Chip Voltage Detection Type Reset Circuit which
prevents incorrect display. Display Data can be
directly displayed without using any decoder. PT6554
also supports both 1/4 duty-1/2 bias and 1/4 duty-1/3
bias drive techniques. Pin assignments and
application circuit are optimized for easy PCB Layout
and cost saving advantages.
FEATURES
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CMOS technology
Up to 164 segment drivers (4 Com x 41 Seg)
Up to 4 general purpose output ports
Key input function
1/4 duty-1/2 bias and 1/4 duty-1/3 bias drive
techniques
Sleep mode & all segment OFF function
On-Chip voltage detection type reset circuit
RC oscillation circuit
Available in 64 pins, QFP or LQFP package
APPLICATION
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Electronic equipment with LCD display
BLOCK DIAGRAM
Tel: 886-66296288
‧
Fax: 886-29174598
‧
http://www.princeton.com.tw
‧
2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan
PT6554
APPLICATION CIRCUITS
Notes:
1. A capacitor must be added to the power line so that both the power supply voltage (VDD) rise time when power is applied and the power supply
voltage (VDD) fall time when power drops are at least 1ms.
2. DO is an open – drain output and requires a pull-high resistor between 1KΩ to 10KΩ. The pull-up resistor value must be appropriate to the capacitor
of the external wiring so that the signal wave forms are not degraded.
V1.4
2
June 2010
PT6554
Notes:
1. A capacitor must be added to the power line so that both the power supply voltage (VDD) rise time when power is applied and the power supply
voltage (VDD) fall time when power drops are at least 1ms.
2. DO is an open – drain output and requires a pull-high resistor between 1KΩ to 10KΩ. The pull-up resistor value must be appropriate to the capacitor
of the external wiring so that the signal wave forms are not degraded.
V1.4
3
June 2010
PT6554
Notes:
1. A capacitor must be added to the power line so that both the power supply voltage (VDD) rise time when power is applied and the power supply
voltage (VDD) fall time when power drops are at least 1ms.
2. DO is an open-drain output and requires a pull-high resistor between 1KΩ to 10KΩ. The pull-up resistor value must be appropriate to the capacitor
of the external writing so that the signal wave forms are not degraded.
3. R1=R2=R3, the resistance value must be decide by the LCD panel size.
V1.4
4
June 2010
stm32/stm8
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