Ordering number : ENN5799A
CMOS IC
LC72341G/W, LC72342G/W, LC72343G/W
Low-Voltage Single-Chip Microcontrollers
with On-Chip PLL and LCD Driver Circuits
Overview
The LC72341G/W, LC72342G/W, and LC72343G/W are
single-chip microcontrollers with both a 1/4-duty 1/2-bias
LCD driver circuit and a PLL circuit that can operate at up
to 250 MHz integrated on the same chip. These ICs are
ideal for use in portable audio equipment.
Functions
• High-speed programmable divider
• Program memory (ROM)
— LC72341G/W: 2048 words
×
16 bits (4KB)
— LC72342G/W: 3072 words
×
16 bits (6KB)
— LC72343G/W: 4096 words
×
16 bits (8KB)
• Data memory (RAM)
— LC72341G/W: 128 words
×
4 bits
— LC72342G/W: 192 words
×
4 bits
— LC72343G/W: 256 words
×
4 bits
• Instruction cycle time
— 40 µs (for all single-word instructions.)
• Stack
— 4 levels (LC72341G/W)
— 8 levels (LC72342G/W, and LC72343G/W)
• LCD driver
— 48 to 80 segments (1/4-duty 1/2-bias drive)
• Timer interrupts
— One timer circuit providing intervals of 1, 5, 10, and 50 ms.
• External interrupts
— One external interrupt (INT)
• A/D converter
— Two channels (5-bit successive approximation)
• Input ports
— 7 (Of which two can be switched to function as A/D
converter inputs)
• Output ports
— 6 (Of which one can be switched to function as the
BEEP tone output. Two ports are open-drain ports.)
• I/O ports
— 16 (Of which 8 can be selected to function as LCD
ports as mask options.)
• PLL circuit
— Two types of dead band control are supported, and an
unlock detection circuit is included.
Reference frequencies of 1, 3, 5, 6.25, 12.5, and
25 kHz can be provided.
• Input frequency range
— FM band: 10 to 130 MHz
130 to 250 MHz
— AM band: 0.5 to 15 MHz
• IF counter
— HCTR input pin; 0.4 to 12 MHz
• Voltage detection circuit (VSENSE)
— Detects the V
DD
voltage and sets a flag
• External reset pin
— Restarts execution from location 0 when the CPU
and PLL circuits are operating
• Power on reset circuit
— Starts execution from location 0 at power on.
• Universal counter
— 20 bits
• Beep tones
— 3.1 and 1.5 kHz
• Halt mode: The microcontroller operating clock is stopped
• Backup mode: The crystal oscillator is stopped
• An amplifier for a low-pass filter is built in
• CPU and PLL circuit operating voltage
— 1.8 to 3.6 V
• RAM data retention voltage
— 1.0 V or higher
• Packages
— QIP-64G : 0.8-mm lead pitch
— SQFP-64 : 0.5-mm lead pitch
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D1099TH (OT)/31398RM (OT) No. 5799-1/12
LC72341G/W, 72342G/W, 72343G/W
Package Dimensions
unit: mm
3231-QFP64G
[LC72341G, 72342G, 72343G]
17.2
14.0
0.8 0.35
1.6
1.0
0.15
1.25
48
unit: mm
3190-SQFP64
[LC72341W, 72342W, 72343W]
12.0
10.0
0.5
0.18
1.25
33
32
1.0
48
1.6
1.0
0.15
33
32
1.25
12.0
10.0
0.5
49
49
17.2
14.0
0.8
17
3.0max
64
17
1
16
1.0
1
16
0.1
2.15
15.6
0.8
0.5
SANYO: QFP64G
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum supply voltage
Input voltage
Output voltage
Symbol
V
DD
max
V
IN
V
OUT
1
V
OUT
2
I
OUT
1
I
OUT
2
Output current
I
OUT
3
I
OUT
4
I
OUT
5
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Tstg
All input pins
AOUT, PE
All output pins except V
OUT
1
PC, PD, PG, PH, EO
PB
AOUT, PE
S1 to S20
COM1 to COM4
Ta = –20 to +70°C
Conditions
Ratings
–0.3 to +4.0
–0.3 to V
DD
+ 0.3
–0.3 to +15
–0.3 to V
DD
to + 0.3
0 to 3
0 to 1
0 to 2
300
3
300
–20 to +70
–45 to +125
Unit
V
V
V
V
mA
mA
mA
µA
mA
mW
°C
°C
0.1
0.5
SANYO: SQFP64
1.7max
64
1.25
No. 5799-2/12
LC72341G/W, 72342G/W, 72343G/W
Allowable Operating Ranges
at Ta = –20 to 70°C, V
DD
= 1.8 to 3.6 V
Parameter
Symbol
V
DD
1
V
DD
2
V
IH
1
Input high-level voltage
V
IH
2
V
IH
3
V
IL
1
Input low-level voltage
V
IL
2
V
IL
3
V
IN
1
Input amplitude
V
IN
2
V
IN
3
V
IN
4
Input voltage range
V
IN
5
F
IN
1
F
IN
2
Input frequency
F
IN
3
F
IN
4
F
IN
5
F
IN
6
Conditions
CPU and PLL operating voltage
Memory retention voltage
V
IH
2, V
IH
3, AMIN, FMIN,
Input ports except HCTR and XIN.
RES
Port PF
V
IL
2, V
IL
3, AMIN, FMIN,
Input ports except HCTR and XIN.
RES
Port PF
XIN
FMIN, AMIN
FMIN
HCTR
ADI0, ADI1
XIN : CI
≤
35 kΩ
FMIN : V
IN
2, V
DD
1
FMIN : V
IN
3, V
DD
1
AMIN (H) : V
IN
2, V
DD
1
AMIN (L) : V
IN
2, V
DD
1
HCTR : V
IN
4, V
DD
1
Ratings
min
1.8
1.0
0.7 V
DD
0.8 V
DD
0.6 V
DD
0
0
0
0.5
0.035
0.05
0.035
0
70
10
130
2
0.5
0.4
75
V
DD
V
DD
V
DD
0.3 V
DD
0.2 V
DD
0.2 V
DD
0.6
0.35
0.35
0.35
V
DD
80
130
250
40
10
12
typ
3.0
max
3.6
Unit
V
V
V
V
V
V
V
V
Vrms
Vrms
Vrms
Vrms
V
kHz
MHz
MHz
MHz
MHz
MHz
Supply voltage
Electrical Characteristics
at Ta = –20 to 70°C, V
DD
= 1.8 to 3.6 V (in the allowable operating ranges)
Parameter
Symbol
I
IH
1
Input high-level current
I
IH
2
I
IH
3
I
IL
1
Input low-level current
I
IL
2
I
IL
3
Input floating voltage
Pull-down resistance
Hysteresis
Voltage doubler reference voltage
Voltage doubler step-up voltage
V
IF
R
PD
1
V
H
DBR4
Conditions
X
IN
: V
I
= V
DD
= 3.0 V
FMIN, AMIN, HCTR : V
I
= V
DD
= 3.0 V
Ports PA/PF (with no pull-down resistor), PC,
PD, PG, and PH. RES: V
I
= V
DD
= 3.0 V
XIN : V
I
= V
DD
= V
SS
FMIN, AMIN, HCTR : V
I
= V
DD
= V
SS
Ports PA/PF (with no pull-down resistor), PC,
PD, PG, and PH. RES: V
I
= V
DD
= V
SS
PA/PF with pull-down resistors used
PA/PF with pull-down resistors used, V
DD
= 3 V
RES
Ta = 25°C, referenced to V
DD
, C3 = 0.47 µF
75
0.1 V
DD
1.3
2.7
100
0.2 V
DD
1.5
3.0
1.7
3.3
–3
–8
3
8
Ratings
min
typ
max
3
20
3
–3
–20
–3
0.05 V
DD
200
Unit
µA
µA
µA
µA
µA
µA
V
kΩ
V
V
V
DBR1, 2, 3 Ta = 25°C, C1 = 0.45 µF, C2 = 0.47 µF, no load
Note: C1, C2, and C3 must be provided even if no LCD is used.
No. 5799-3/12
LC72341G/W, 72342G/W, 72343G/W
Electrical Characteristics
at Ta = –30 to 70°C, V
DD
= 1.8 to 3.6 V (in the allowable operating ranges)
Parameter
Symbol
V
OH
1
V
OH
2
V
OH
3
Output high-level voltage
V
OH
4
V
OH
5
V
OH
6
V
OL
1
V
OL
2
V
OL
3
V
OL
4
Output low-level voltage
V
OL
5
V
OL
6
V
OL
7
V
OL
8
Output off leakage current
A/D conversion error
I
OFF
1
I
OFF
2
PB : I
O
= –1 mA
PC, PD, PG, PH : I
O
= –1 mA
EO : I
O
= –500 µA
XOUT : I
O
= –200 µA
S1 to S20 : I
O
= –20 µA:
*1
COM1, COM2, COM3, COM4:
I
O
= –100 µA :
*1
PB : I
O
= –50 µA
PC, PD, PE, PG, PH : I
O
= –1 mA
EO : I
O
= –500 µA
XOUT : I
O
= –200 µA
S1 to S20 : I
O
= –20 µA:
*1
COM1, COM2, COM3, COM4 :
I
O
= –100 µA :
*1
PE : I
O
= 5 mA
AOUT : I
O
= 1 mA, AIN = 1.3 V, V
DD
= 3 V
Ports PB, PC, PD, PG, PH, and EO
Ports AOUT and PE
ADI0, ADI1, V
DD
= V
DD
1
–3
–100
–1/2
Conditions
Ratings
min
V
DD
– 0.7 V
DD
V
DD
– 0.3 V
DD
V
DD
– 0.3 V
DD
V
DD
– 0.3 V
DD
2.0
2.0
0.7 V
DD
0.3 V
DD
0.3 V
DD
0.3 V
DD
1.0
1.0
1.0
0.5
+3
+100
+1/2
typ
max
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
nA
LSB
Note: 1. Capacitors C1, C2, and C3 must be connected to the DBR pins.
Electrical Characteristics
at Ta = –20 to 70°C, V
DD
= 1.8 to 3.6 V (in the allowable operating ranges)
Parameter
Falling supply voltage detection voltage
Rising supply voltage detection voltage
Symbol
V
SENSE
1
V
SENSE
2
I
DD
1
I
DD
2
Supply current
I
DD
3
I
DD
4
Ta = 25°C
*2
Ta = 25°C
*2
V
DD
1 : F
IN
2 130 MHz, Ta = 25°C
V
DD
2: In halt mode at Ta = 25°C,
*3
V
DD
= 3.6 V, with the oscillator stopped,
at Ta = 25°C,
*4
V
DD
= 1.8 V, with the oscillator stopped,
at Ta = 25°C,
*4
Conditions
Ratings
min
1.6
VSENSE1 +0.1
5
0.1
1
0.5
typ
1.75
max
1.9
VSENSE1 +0.2
15
Unit
V
V
mA
mA
µA
µA
Notes: 1. The halt mode current is measured with the CPU executing 20 instructions every 125 ms.
2. The V
SENSE
voltage
When the V
DD
voltage falls, the V
SENSE
flag is set at the point that voltage falls under 1.75 V (typical). The TST instruction can be used to read the
value of the V
SENSE
flag. Applications can easily determine when the batteries are exhausted by monitoring this flag. After V
SENSE
is set when the
supply voltage falls, it will not be reset if the supply voltage rises by less than 0.1 V, because the voltages detected by the V
SENSE
circuit differ when
the supply voltage is falling and when the supply voltage is rising.
When the Supply Voltage is Falling
When the Supply Voltage is Rising
No. 5799-4/12
LC72341G/W, 72342G/W, 72343G/W
Note: 3. Halt Mode Current Test Circuit
Note: 4. Backup Mode Current Test Circuit
All ports other than those specified in the figure
must be left open.
Set ports PC and PD to output.
Select segments S13 to S20.
All ports other than those specified in the figure
must be left open.
Set ports PC and PD to output.
Select segments S13 to S20.
Pin Assignment
*
PE0 and PE1 are open-drain outputs.
*
The I/O ports can be set to input or output individually.
*
The functions of the segment/general-purpose ports can be set in bit units.
No. 5799-5/12
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