Advanced Power
Electronics Corp.
FEATURES
Ultra Low Dropout 0.21V(typical) @ 2A Output
Current for 1.2V Output Voltage
Low ESR Output Capacitor (Multi-layer Chip
Capacitors (MLCC)) Applicable
EN Pull-low for APE8981MP-A
EN Pull-high for APE8981MP-B
Fast Transient Response
Adjustable Output Voltage by External Resistors
Power-On-Reset Monitoring on Both VCNTL
and VIN Pins
Internal Soft-Start
Current-Limit and Thermal Shutdown Protection
Power-OK Output with a Delay Time
SO-8 with Exposed Pad Pb-Free &
DFN 3x3-10L Package.
Halogen Free Product
APE8981
DESCRIPTION
The APE8981 series is a 3A ultra low dropout linear
regulator. This product is specifically designed to provide
well supply voltage for front-side-bus termination on
motherboards and NB applications. The IC needs two
supply voltages, a control voltage for the circuitry and a
main supply voltage for power conversion, to reduce power
dissipation and provide extremely low dropout. The
APE8981 series integrates many functions. A Power-On-
Reset (POR) circuit monitors both supply voltages to
prevent wrong operations. A thermal shutdown and current
limit functions protect the device against thermal and
current over-loads. A POK indicates the output status with
time delay which is set internally. It can control other
converter for power sequence.
The APE8981 series can be enabled by other power
system. Pulling and holding the EN pin below 0.4V shuts off
the output.
The APE8981 series is available in DFN 3x3-10L &
ESOP-8 package which features small size as SO-8 and an
Exposed Pad to reduce the junction-to-case resistance.
3A ULTRA LOW DROPOUT LINEAR REGULATOR
TYPICAL APPLICATION
POK
R3
10k
EN
V
IN
V
CNTL
C1
4 .7 uF
C2
1 uF
EN
VIN
.
U1
POK
GND
FB
VOUT
NC
R1
20k
CF
*option
Cout
10uF
V
OUT
VCNTL
APE8981
R2
10k
Data and specifications subject to change without notice
1
201301046
Advanced Power
Electronics Corp.
PACKAGE/ORDERING INFORMATION
( Top View )
APE8981
( Top View )
8 GND
7 FB
GND
6
VOUT
APE8981X-X
EN Function
Package Type
MP : ESOP-8
A : Internal Pull Low
GN3 : DFN 3x3-10L B : Internal Pull High
POK
EN
VIN
VCNTL
1
2
3
4
ESOP-8
5 NC
VOUT
VOUT
VOUT
FB
POK
1
2
3
4
5
GND
10 VCNTL
9 VIN
8 VIN
7 VIN
6 EN
DFN 3x3-10L
ABSOLUTE MAXIMUM RATINGS
(Note1)
CNTL Supply Voltage (V
CNTL
) --------------------------- -0.3V To 6.5V
Input Supply Voltage (V
IN
) ------------------------------- -0.3V To 6.5V
EN & FB Pin Voltage (V
EN
/V
FB
) ------------------------- -0.3V To VCNTL+0.3V
Power Good Voltage (V
POK
) ---------------------------- -0.3V To 6.5V
Power Dissipation (P
D
) ---------------------------------- 2.5W
Storage Temperature Range (T
ST
) -------------------- -65°C To 150°C
Junction Temperature Range (T
J
) --------------------- -40°C To 150°C
Thermal Resistance Junction to Ambient (Rth
ja
)
Note
ESOP-8 ------- 40°C/W
DFN 3x3-10L
Thermal Resistance Junction to Case (Rth
jc
)
Note
ESOP-8 ------- 15°C/W
DFN 3x3-10L
Note. mounted on a Demo board
62.5°C/W
17°C/W
.
RECOMMENDED OPERATING CONDITIONS
Operating Junction Temperature Range (T
OJ
) ----- -40°C To 125°C
Operating Ambient Temperature Range (T
OA
) ----- -40°C To 85°C
VCNTL Supply Voltage (V
CNTL
) ------------------------- 3V To 6V
Input Supply Voltage (V
IN
) ------------------------------- 1.1V To 5.5V
Output Voltage (V
OUT
)@V
CNTL
> V
OUT
+ 2.5V ------- 0.8V To 2.8V
Output Cunrrent (I
OUT
) ------------------------------------ 0A To 3A
2
Advanced Power
Electronics Corp.
ELECTRICAL SPECIFICATIONS
V
CNTL
= 5V, V
IN
=1.8V, V
OUT
=1.2V, T
A
=25
o
C unless otherwise specified
Parameter
V
IN
POR Threshold
V
IN
POR Hysteresis
V
CNTL
Nominal Supply Current
VCNTL Shutdown Current
Feedback Voltage
Load Regulation
On Resistance
Dropout Voltage
V
OUT
Pull Low Resistance
Soft Start Time
EN Pin Logic High Threshold Voltage
EN Pin Pull-Up Current
Current Limit
Ripple Rejection
V
IN
V
CNTL
T
SS
V
ENH
V
ENL
I
EN
I
LIM
PSRR
V
POK
V
PNOK
T
DELAY
(Note1)
APE8981
TEST CONDITION
MIN
0.8
-
EN= V
CNTL
EN=0V
APE8981MP-A
APE8981MP-B
-
-
-
0.784
-
-
-
-
-
Enable
Disable
EN=5V, APE8981MP-A
EN=GND, APE8981MP-B
V
CNTL
=5V, V
IN
=V
OUT
+1V
F=120Hz, I
OUT
=100mA
VFB Rising
VFB Falling
POK sinks 5mA
1.2
-
-
-
3.1
-
-
92%
83%
-
0.8
-
-
TYP
0.9
0.5
1.3
-
10
0.8
0.5
105
0.21
40
0.2
-
-
10
10
-
65
65
94%
88%
-
2
160
40
MAX
1
-
-
1
30
0.816
1
150
0.3
-
-
-
0.6
20
20
-
-
-
96%
91%
0.1
10
-
-
UNITS
V
V
mA
uA
V
%
mΩ
V
Ω
ms
V
uA
A
dB
V
FB
V
FB
V
ms
o
o
SYM
V
IN
V
IN(hys)
I
CNTL
I
SD
V
FB
V
CNTL
=3 ~ 6V, I
OUT
=10mA,
V
IN
=V
OUT
+0.5~5.5V
I
OUT
=0A ~ 2A
I
OUT
=100mA, V
CNTL
=V
EN
=5.0V,
V
OUT
=1.2V
I
OUT
= 2A, V
CNTL
=5V, V
OUT
= 1.2V
R
DS(ON)
V
DROP
EN=0V
.
POK Threshold Voltage for Power OK
POK Threshold Voltage for Power Not OK
POK Low Voltage
POK Delay Time
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
(Note1)
T
SD
C
C
Note1: Guarantee by design, not production tested.
3
Advanced Power
Electronics Corp.
PIN DESCRIPTIONS
PIN SYMBOL
POK
EN
VIN
VCNTL
NC
VOUT
FB
GND
PIN DESCRIPTION
Power OK Output Pin
APE8981
APE8981MP-A: Internal pull low; HIGH for enable, LOW or floating for shutdown.
APE8981MP-B: Internal pull high; HIGH or floating for enable, LOW for shutdown.
Supply input for power conversion. The pin is monitored for Power-On Reset purpose.
Power input pin of the control circuitry. The pin is monitored for Power-On Reset
purpose.
No Connect
Output Voltage
Feedback Pin
GND Pin
BLOCK DIAGRAM
APE8981MP-A
VIN
Power- ON
Reset
Current
Limit
Soft -Start
And
Control Logic
-
+
N-MOSFET
VOUT
VCNTL
Error
Amp
EN
10uA
Enable
Bandgap
.
FB
+
-
POK
Thermal
Shutdown
GND
Delay
POK
94%
V
REF
APE8981MP-B
VIN
Power- ON
Reset
10uA
N-MOSFET
VOUT
Current
Limit
Soft -Start
And
Control Logic
-
+
VCNTL
Error
Amp
EN
Enable
Bandgap
Thermal
Shutdown
+
FB
-
POK
GND
Delay
POK
94%
V
REF
4
Advanced Power
Electronics Corp.
PIN DESCRIPTION
FB
APE8981
Connecting this pin to an external resistor divider receives the feedback voltage of the
regulator. The output voltage set by the resistor divider is determined by:
Where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected from FB
to GND. A bypass capacitor may be connected with R1 in parallel to improve load transient
response. The R2 range in 1K~4.7KΩ for AL output capacitor and 30K~100KΩ for MLCC output
capacitor are recommended.
VIN
Main supply input pins for power conversions. The voltage at this pin is monitored for Power-
On Reset purpose.
VCNTL
Power input pin of the control circuitry. Connecting this pin to a +5V (recommended) supply
voltage provides the bias for the control circuitry. The voltage at this pin is monitored for Power-
On Reset purpose.
POK
Power-OK signal output pin. This pin is an open-drain output used to indicate status of
output voltage by sensing FB voltage. This pin is pulled low when the rising FB voltage is not
above the VPOK threshold or the falling FB voltage is below the VPOK threshold, indicating the
output is not OK.
EN
.
Enable control pin. Pulling and holding this pin below 0.4V shuts down the output. When re-
enabled, the IC undergoes a new soft-start cycle. For APE8981MP-B, this pin is internal pulled up
to VCNTL voltage, enabling the regulator. For APE8981MP-A, this pin is internal pulled down to
GND voltage, shutdown the regulator. The pull-high current is 10uA (typ.)
VOUT
Output of the regulator. Please connect Pin 6 using wide tracks. It is necessary to connect
an output capacitor with this pin for closed-loop compensation and improving transient responses.
FUNCTION DESCRIPTION
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins to
prevent wrong logic controls. The POR function initiates a soft-start process after the two supply
voltages exceed their rising POR threshold voltages during powering on. The POR function also
pulls low the POK pin regardless the output voltage when the VCNTL voltage falls below its falling
POR threshold.
Internal Soft-Start
An internal soft-start function controls rise rate of the output voltage to limit the current surge
at start-up. The typical soft-start interval is about 0.2ms.
Output Voltage Regulation
An error amplifier working with a temperature compensated 0.8V reference and an output
NMOS regulates output to the preset voltage. The error amplifier designed with high bandwidth
and DC gain provides very fast transient response and less load regulation. It compares the
reference with the feedback voltage and amplifies the difference to drive the output NMOS which
provides load current from VIN to VOUT.
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