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HD74LV126ARP

产品描述LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, FP-14DNV
产品类别逻辑    逻辑   
文件大小71KB,共10页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
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HD74LV126ARP概述

LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, FP-14DNV

HD74LV126ARP规格参数

参数名称属性值
厂商名称Renesas(瑞萨电子)
零件包装代码SOIC
包装说明SOP,
针数14
Reach Compliance Codeunknown
系列LV/LV-A/LVX/H
JESD-30 代码R-PDSO-G14
长度8.65 mm
逻辑集成电路类型BUS DRIVER
位数1
功能数量4
端口数量2
端子数量14
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE
传播延迟(tpd)18.5 ns
认证状态Not Qualified
座面最大高度1.75 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
宽度3.95 mm

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HD74LV126A
Quad. Bus Buffer Gates with 3-state Outputs
REJ03D0316–0300Z
(Previous ADE-205-259A (Z))
Rev.3.00
Jun. 03, 2004
Description
The HD74LV126A features independent line drivers with three state outputs. Each output is disabled when the
associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE
should be connected to GND through a pull-down resistor; the minimum value of the resistor is determined by the
current souring capability of the driver. Low-voltage and high-speed operation is suitable for the battery-powered
products (e.g., notebook computers), and the low-power consumption extends the battery life.
Features
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25°C)
Output current ±8 mA (@V
CC
= 3.0 V to 3.6 V), ±16 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Package Type
SOP–14 pin(JEITA)
SOP–14 pin(JEDEC)
TSSOP–14 pin
Package Code
FP–14DAV
FP–14DNV
TTP–14DV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LV126AFPEL
HD74LV126ARPEL
HD74LV126ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
OE
H
H
L
Note: H:
L:
X:
Z:
High level
Low level
Immaterial
High impedance
A
H
L
X
Output Y
H
L
Z
Rev.3.00 Jun. 03, 2004 page 1 of 9

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